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參數(shù)資料
| 型號(hào)： | ADV7303AKST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | Sand Paper; Abrasive Grade:T; Color:White; Pack Quantity:3; Roll Length:30ft; Width:4" |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 封裝： | PLASTIC, MS-026BCD, LQFP-64 |
| 文件頁(yè)數(shù)： | 23/68頁(yè) |
| 文件大?。?/td> | 1177K |
| 代理商： | ADV7303AKST |
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REV. A
ADV7302A/ADV7303A
–23–
Subaddress Register
43h
Bit Description
SD Pedestal YUV Output
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
Reset
00h
SD Mode Register 2
0
No Pedestal on YUV
1
7.5 IRE Pedestal on
YUV
Y = 700 mV/300 mV
SD Output Levels Y
0
1
Y = 714 mV/286 mV
SD Output Levels UV
0
0
700 mV p-p [PAL];
1000 mV p-p [NTSC]
700 mV p-p
0
1
1
0
1000 mV p-p
1
1
648 mV p-p
SD VBI Open
0
Disabled
1
Enabled
0
0
CC Disabled
0
1
CC on Odd Field Only
1
0
CC on Even Field
Only
CC on Both Fields
1
1
1
Reserved
0
Disabled
1
VSYNC = 2.5 lines
[PAL]; VSYNC = 3
lines [NTSC]
Genlock Disabled
0
0
0
1
Subcarrier Reset
1
0
Timing Reset
1
1
RTC Enabled
0
720 Pixels
1
710 (NTSC);
702(PAL)
Chroma Enabled
0
1
Chroma Disabled
0
Enabled
1
Disabled
0
Disabled
1
Enabled
Reserved
0
Zero must be written
to this bit.
45h
Reserved
00h
46h
Reserved
00h
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
Disabled
1
Enabled
Reserved
0
Zero must be written
to this bit.
Zero must be written
to this bit.
Zero must be written
to this bit.
Reserved
0
Reserved
0
SD Mode Register 3
SD RTC/TR/SCR
SD VSYNC-3H
00h
00h
SD Mode Register 4
47h
SD Luma SSAF Gain
SD Brightness
SD Hue Adjust
SD Y Scale
SD UV Scale
SD CC Field Control
44h
SD Active Video Length
SD Chroma
SD Burst
SD Color Bars
Table VII. SD Mode Registers (continued)
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