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參數(shù)資料
| 型號(hào)： | ADV7202 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | Codec |
| 英文描述： | Simultaneous Sampling Video Rate Codec |
| 中文描述： | 同時(shí)采樣率視頻編解碼器 |
| 文件頁(yè)數(shù)： | 21/26頁(yè) |
| 文件大?。?/td> | 216K |
| 代理商： | ADV7202 |
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REV. PrB
PRELIMINARY TECHNICAL DATA
ADV7202
–21–
CLAMP REGISTER 2
CR2 (CR20–CR27)
(Address (SR4–SR0) = 08H)
Figure 27 shows the various operations under the control of
Clamp Register 2.
CR2 BIT DESCRIPTION
Fine Clamp 0 Up/Down (CR20)
This bit controls the direction of fine clamp number 1, valid
only if the clamp is enabled.
Fine Clamp 0 ON/OFF (CR21)
This bit switches fine clamp number 1 on for the prescribed
number of clock cycles (CR10–CR12).
Fine Clamp 1 Up/Down (CR22)
This bit controls the direction of fine clamp number 2, valid
only if the clamp is enabled.
Fine Clamp 1 ON/OFF (CR23)
This bit switches fine clamp number 2 on for the prescribed
number of clock cycles (CR10–CR12).
Fine Clamp 2 Up/Down (CR24)
This bit controls the direction of fine clamp number 3, valid
only if the clamp is enabled.
Fine Clamp 2 ON/OFF (CR25)
This bit switches fine clamp number 3 on for the prescribed
number of clock cycles (CR10–CR12).
Reserved (CR26–CR27)
Zero must be written to these registers.
CR27
CR22
CR24
CR26
ZERO MUST BE
WRITTEN TO
THESE REGISTERS
CR27
–
CR26
CR24
0
1
DOWN
UP
FINE CLAMP 2 UP/DOWN
CR25
CR23
CR21
CR20
CR22
0
1
DOWN
UP
FINE CLAMP 1 UP/DOWN
CR20
0
1
DOWN
UP
FINE CLAMP 0 UP/DOWN
CR25
0
1
OFF
ON
FINE CLAMP 2 ON/OFF
CR23
0
1
OFF
ON
FINE CLAMP 1 ON/OFF
CR21
0
1
OFF
ON
FINE CLAMP 0 ON/OFF
Figure 27. Clamp Register 2
CLAMP REGISTER 3
CR3 (CR30–CR37)
(Address (SR4–SR0) = 09H)
Figure 28 shows the various operations under the control of
Clamp Register 3.
CR3 BIT DESCRIPTION
Coarse Clamp 0 Up/Down (CR30)
This bit controls the direction of coarse clamp number 1, valid
only if the clamp is enabled.
Coarse Clamp 0 ON/OFF (CR31)
This bit switches coarse clamp number 1 on for the prescribed
number of clock cycles (CR13–CR15).
Coarse Clamp 1 Up/Down (CR32)
This bit controls the direction of coarse clamp number 2, valid
only if the clamp is enabled.
Coarse Clamp 1 ON/OFF (CR33)
This bit switches coarse clamp number 2 on for the prescribed
number of clock cycles (CR13–CR15).
Coarse Clamp 2 Up/Down (CR34)
This bit controls the direction of coarse clamp number 3, valid
Coarse Clamp 2 ON/OFF (CR35)
This bit switches coarse clamp number 3 on for the prescribed
number of clock cycles (CR13–CR15).
Reserved (CR36–CR37)
Zero must be written to these registers.
CR34
CR37
CR32
ZERO MUST BE
WRITTEN TO
THESE REGISTERS
CR37
–
CR36
CR35
0
1
OFF
ON
COARSE CLAMP 2 ON/OFF
CR34
0
1
DOWN
UP
COARSE CLAMP 2 UP/DOWN
CR33
0
1
OFF
ON
COARSE CLAMP 1 ON/OFF
CR32
0
1
DOWN
UP
COARSE CLAMP 1 UP/DOWN
CR30
0
1
DOWN
UP
COARSE CLAMP 0 UP/DOWN
CR31
0
1
OFF
ON
COARSE CLAMP 0 ON/OFF
CR36
CR35
CR33
CR31
CR30
Figure 28. Clamp Register 3
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