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參數(shù)資料
型號(hào)： ADUC843BSZ62-5
廠商： Analog Devices Inc
文件頁數(shù)： 74/88頁
文件大?。?/td> 0K
描述： IC ADC 12BIT W/FLASH MCU 52-MQFP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 16.78MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： DMA，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 62KB（62K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 52-QFP
包裝： 托盤
產(chǎn)品目錄頁面： 738 (CN2011-ZH PDF)
ADuC841/ADuC842/ADuC843
Rev. 0 | Page 76 of 88
C1+
V+
C1–
C2+
C2–
V–
T2OUT
R2IN
VCC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
ADM202
1
2
3
4
5
6
7
8
9
DVDD
9-PIN D-SUB
FEMALE
DVDD
27
34
33
31
30
29
28
39
38
37
36
35
32
40
47
46
44
43
42
41
52
51
50
49
48
45
DVDD
1k
DVDD
1k
2-PIN HEADER FOR
EMULATION ACCESS
(NORMALLY OPEN)
DOWNLOAD/DEBUG
ENABLE JUMPER
(NORMALLY OPEN)
11.0592MHz (ADuC841)
32.768kHz (ADuC842/ADuC843)
DVDD
AVDD
AGND
CREF
VREF
DAC0
DAC1
DV
DD
DGND
PSEN
EA
DGND
DVDD
XTAL2
XTAL1
R
ESET
RX
D
TXD
DV
DD
DGND
NOT CONNECTED IN THIS EXAMPLE
ADuC841/ADuC842/ADuC843
ADC0
ADC7
ANALOG INPUT
VREF OUTPUT
DAC OUTPUT
03260-0-084
Figure 85. Example System (PQFP Package), DACs Not Present on ADuC843
OTHER HARDWARE CONSIDERATIONS
To facilitate in-circuit programming, plus in-circuit debug and
emulation options, users will want to implement some simple
connection points in their hardware to allow easy access to
download, debug, and emulation modes.
In-Circuit Serial Download Access
Nearly all ADuC841/ADuC842/ADuC843 designs want to take
advantage of the in-circuit reprogrammability of the chip. This
is accomplished by a connection to the ADuC841/ADuC842/
ADuC843’s UART, which requires an external RS-232 chip for
level translation if downloading code from a PC. Basic configura-
tion of an RS-232 connection is illustrated in Figure 85 with a
simple ADM202 based circuit. If users would rather not design
an RS-232 chip onto a board, refer to Application Note uC006, A
4-Wire UART-to-PC Interface, (at www.analog.com/microconverter)
for a simple (and zero-cost-per-board) method of gaining in-
circuit serial download access to the part.
In addition to the basic UART connections, users also need a
way to trigger the chip into download mode. This is accom-
plished via a 1 k pull-down resistor that can be jumpered onto
the PSEN pin, as shown in Figure 85. To get the part into download
mode, simply connect this jumper and power-cycle the device
(or manually reset the device, if a manual reset button is available),
and it will be ready to serially receive a new program. With the
jumper removed, the device comes up in normal mode (and
runs the program) whenever power is cycled or RESET is toggled.
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