參數(shù)資料
型號(hào)： ADUC836BCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 2/80頁(yè)
文件大小： 0K
描述： IC MCU 62K FLASH ADC/DAC 56LFCSP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 12.58MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設(shè)備： POR，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 62KB（62K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 7x16b; D/A 1x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-VFQFN 裸露焊盤，CSP
包裝： 托盤
ADuC836
–10–
ADuC836
–11–
PIN FUNCTION DESCRIPTIONS
Pin No. Pin No.
52-Lead 56-Lead
MQFP CSP
Mnemonic
Type* Description
1, 2
56, 1
P1.0/P1.1
I/O
P1.0 and P1.1 can function as digital inputs or digital outputs and have a pull-up
configuration as described for Port 3. P1.0 and P1.1 have an increased current drive
sink capability of 10 mA.
P1.0/T2/PWM0
I/O
P1.0 and P1.1 also have various secondary functions as described below. P1.0 can be
used to provide a clock input to Timer 2.When enabled, Counter 2 is incremented
in response to a negative transition on the T2 input pin. If the PWM is enabled, the
PWM0 output will appear at this pin.
P1.1/T2EX/PWM1 I/O
P1.1 can also be used to provide a control input to Timer 2.When enabled, a PWM1
negative transition on the T2EX input pin will cause a Timer 2 capture or reload event.
If the PWM is enabled, the PWM1 output will appear at this pin.
3–4,
2–3,
P1.2–P1.7
I
Port 1.2 to Port 1.7 have no digital output driver; they can function as a digital input
9–12
11–14
for which 0 must be written to the port bit. As a digital input, these pins must be
driven high or low externally.These pins also have the following analog functionality:
P1.2/DAC/IEXC1 I/O
The voltage output from the DAC or one or both current sources (200 A or
2 200 A) can be configured to appear at this pin.
P1.3/AIN5/IEXC2 I/O
Auxiliary ADC input or one or both current sources can be configured at this pin.
PLL WITH PROG.
CLOCK DIVIDER
WATCHDOG
TIMER
2304 BYTES
USER RAM
POWER SUPPLY
MONITOR
AIN3
AIN4
AIN5
AIN1
AIN2
REFIN
IEXC 2
IEXC 1
AIN
MUX
TEMP
SENSOR
AIN
MUX
BAND GAP
REFERENCE
VREF
DETECT
CURRENT
SOURCE
MUX
200A
5
AV
DD
6
AGND
20
21
DGND
35
26
SCLOCK
27
MOSI/SDAT
A
14
MISO
13
SS
XTAL1
P0.0
(AD0
)
P0.1
(AD1
)
P0.3
(AD3
)
P0.4
(AD4
)
P0.5
(AD5
)
P0.6
(AD6
)
P0.7
(AD7
)
43
44 45 46 49 50 51 52
P0.2
(AD2
)
BUF
ADuC836
AUXILIARY ADC
16-BIT
- ADC
ADC CONTROL
AND
CALIBRATION
PGA
PRIMARY ADC
16-BIT
- ADC
ADC
CONTROL
AND
CALIBRATION
3
22
T0
23
T1
2
T2EX
T2
1
INT0
INT1
DAC
40
EA
41
PSEN
17
TXD
16
RX
D
4 KBYTES DATA
FLASH/EE
62 KBYTES PROGRAM/
FLASH/EE
UART
SERIAL PORT
8052
MCU
CORE
DOWNLOADER
DEBUGGER
BUF
SINGLE-PI
N
EMULATOR
SPI/I2C SERIAL
INTERFACE
16-BIT
COUNTER
TIMERS
WAKE-UP/
RTC TIMER
XTAL2
33
OSC
P1.0
(T2
)
P1.1
(T2EX
)
P1.2
(DAC/IEXC
1)
P1.4
(AIN1
)
P1.5
(AIN2
)
P1.6
(AIN3
)
P1.7
(AIN4/DAC
)
P1.3
(AIN5/IEXC
2)
1
2
3
4
9
10 11 12
P2.0
(A
8
/A
1
6
)
P2.1
(A9/A17
)
P2.2
(A
1
0
/A
1
8
)
P2.3
(A11/A19
)
P2.4
(A
1
2
/A
2
0
)
P2.5
(A
1
3
/A
2
1
)
P2.6
(A
1
4
/A
2
)
P2.7
(A
1
5
/A
2
3
)
28 29 30 31 36
39
38
37
16
P3.0
(RXD
)
17
P3.1
(TXD
)
18
P3.2
(INT
0)
19
P3.3
(INT
1)
22
P3.4
(T0/PWMCLK
)
23
P3.5
(T1
)
24 25
P3.7
(RD
)
P3.6
(WR
)
12-BIT
VOLTAGE
OUTPUT DAC
2 DATA POINTERS
11-BIT STACK POINTER
PWM0
PWM1
PWM
CONTROL
1
2
32
42
AL
E
15
RESET
48
DV
DD
34
47
UART
TIMER
*PIN NUMBERS REFER TO THE 52-LEAD MQFP PACKAGE
SHADED AREAS REPRESENT THE NEW FEATURES OF THE ADuC836 OVER THE ADuC816
DUAL
16-BIT
- DAC
DUAL
16-BIT
PWM
MUX
DAC
CONTROL
POR
18
19
Figure 1. Detailed Block Diagram
REV. A
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