參數(shù)資料
型號： ADUC702X
廠商： Analog Devices, Inc.
元件分類： 32位微控制器
英文描述： Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
中文描述： 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器
文件頁數(shù)： 57/80頁
文件大小： 840K
代理商： ADUC702X
Preliminary Technical Data
ADuC702x Series
Rev. PrB | Page 57 of 80
SERIAL PERIPHERAL INTERFACE
The ADuC702x integrates a complete hardware Serial
Peripheral Interface (SPI) on-chip. SPI is an industry standard
synchronous serial interface that allows eight bits of data to be
synchronously transmitted and received simultaneously, i.e., full
duplex up to a maximum bit rate of 5.6Mbs. The SPI Port can
be configured for Master or Slave operation and typically
consists of four pins, namely:
MISO (Master In, Slave Out Data I/O Pin)
The MISO (master in slave out) pin is configured as an input
line in master mode and an output line in slave mode. The
MISO line on the master (data in) should be connected to the
MISO line in the slave device (data out). The data is transferred
as byte wide (8-bit) serial data, MSB first.
MOSI (Master Out, Slave In Pin)
The MOSI (master out slave in) pin is configured as an output
line in master mode and an input line in slave mode.
The MOSI line on the master (data out) should be connected to
the MOSI line in the slave device (data in). The data is
transferred as byte wide (8-bit) serial data, MSB first.
SCL (Serial Clock I/O Pin)
The master serial clock (SCL) is used to synchronize the data
being transmitted and received through the MOSI SCL period.
Therefore, a byte is transmitted/received after eight SCL
periods. The SCL pin is configured as an output in master mode
and as an input in slave mode.
In master mode polarity and phase of the clock are controlled
by the SPICON register, and the bit-rate is defined in the
SPIDIV register as follow:
)
1
2
SPIDIV
f
f
coreclock
+
k
serialcloc
×
=
The maximum serial bit clock frequency is 1/8 of the core clock
which, based on a maximum core clock frequency of 45MHz is
just above 5.6Mbs.
In slave mode the SPICON register must be configured with the
phase and polarity of the expected input clock.
In both master and slave modes, the data is transmitted on one
edge of the SCL signal and sampled on the other. It is important
therefore that the polarity and phase are configured the same
for the master and slave devices.
Chip Select (CS) Input Pin
In SPI Slave Mode, a transfer is initiated by the assertion of CS
which is an active low input signal. The SPI port will then
transmit and receive 8-bit data until the transfer is concluded by
desassertion of CS . In slave mode CS is always an input.
SPI registers definition
The following MMR registers are used to control the SPI
interface:
-
SPICON:
16-bit control register
-
SPISTA:
8-bit read only status register
-
SPIDIV:
8-bit serial clock divider register
-
SPITX:
8-bit write only transmit register
-
SPIRX:
8-bit read only receive register
Table 46: SPICON MMR Bit Descriptions
Bit
15-13
12
Description
Reserved
Continuous transfer enable
Set
by user to enable continuous transfer.
In master mode the transfer will continue until no valid data is available in the TX register. CS will be asserted and remain
asserted for the duration of each 8-bit serial transfer until TX is empty
Cleared
by user to disable continuous transfer. Each transfer consists of a single 8-bit serial transfer. If valid data exists in
the SPITX register then a new transfer is initiated after a stall period
Loop back enable
Set
by user to connect MISO to MOSI and test software
Cleared
by user to be in normal mode
Slave output enable
Set
by user to enable the slave output
Cleared
by user to disable slave output
Slave select input enable
Set
by user in master mode to enable the output
SPIRX overflow overwrite enable
Set by user, the valid data in the RX register is overwritten by the new serial byte received
11
10
9
8
相關(guān)PDF資料
PDF描述
ADUC7020 Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
ADUC702 5 AMP MINIATURE POWER RELAY
ADUC814ARU-REEL7 Circular Connector; MIL SPEC:MIL-DTL-38999 Series I; Body Material:Metal; Series:LJT; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight RoHS Compliant: No
ADUC814BRU Circular Connector; MIL SPEC:MIL-DTL-38999 Series I; Body Material:Metal; Series:LJT; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight RoHS Compliant: No
ADUC814BRU-REEL Circular Connector; No. of Contacts:56; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-4
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADUC702X_1 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
ADUC7030 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Precision Battery Sensor For Automotive
ADUC7030BCPZ-8V 功能描述:IC BATT SENSOR PREC AUTO 48LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND
ADUC7030BCPZ-8V-RL 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LFCSP EP - Tape and Reel
ADUC7030XCPZ-7-RL 制造商:Analog Devices 功能描述:- Tape and Reel
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*