參數(shù)資料
型號： ADUC702X
廠商： Analog Devices, Inc.
元件分類： 32位微控制器
英文描述： Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
中文描述： 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器
文件頁數(shù)： 17/80頁
文件大?。?/td> 840K
代理商： ADUC702X
Preliminary Technical Data
ADuC702x Series
Rev. PrB | Page 17 of 80
Pin#
Mnemonic
Type
*
Function
General Purpose Input-Output Port 1.3/ UART / I
2
C1 /Programmable Logic
Array Input Element 3
Serial Port Multiplexed:
General Purpose Input-Output Port 1.2 / UART / I
2
C1 /Programmable Logic
Array Input Element 2
Serial Port Multiplexed:
General Purpose Input-Output Port 1.1 / UART / I
2
C0 / Programmable Logic
Array Input Element 1
Serial Port Multiplexed:
General Purpose Input-Output Port 1.0/ Timer 1 Input / UART / I
2
C0 /
Programmable Logic Array Input Element 0
General Purpose Input-Output Port 4.2 / External Memory Interface /
Programmable Logic Array Output Element 10
General Purpose Input-Output Port 4.3 / External Memory Interface
/Programmable Logic Array Output Element 11
General Purpose Input-Output Port 4.4 / External Memory Interface
/Programmable Logic Array Output Element 12
General Purpose Input-Output Port 4.5 / External Memory Interface
/Programmable Logic Array Output Element 13
Ground for the reference. Typically connected to AGND
2.5V internal Voltage Reference. Must be connected to a 0.47uF capacitor
when using the internal reference.
External Voltage Reference for the DACs. Range: DACGND to DACV
DD
Ground for the DAC. Typically connected to AGND
Analog Ground. Ground reference point for the analog circuitry
Analog Ground. Ground reference point for the analog circuitry
3.3V Analog Power
3.3V Analog Power
3.3V Power Supply for the DACs. Typically connected to AV
DD
Single-ended or differential Analog input 11
Single-ended or differential Analog input 0
Single-ended or differential Analog input 1
Single-ended or differential Analog input 2/ Comparator positive input
Single-ended or differential Analog input 3/ Comparator negative input
60
P1.2/SPM2/PLAI[2]
I/O
61
P1.1/SPM1/PLAI[1]
I/O
62
P1.0/T1/SPM0/PLAI[0]
I/O
63
P4.2/AD10/PLAO[10]
I/O
64
P4.3/AD11/PLAO[11]
I/O
65
P4.4/AD12/PLAO[12]
I/O
66
P4.5/AD13/PLAO[13]
I/O
67
REFGND
S
68
V
REF
I/O
69
70
71
72
73
74
75
76
77
78
79
80
DAC
REF
DACGND
AGND
AGND
AV
DD
AV
DD
DACV
DD
ADC11
ADC0
ADC1
ADC2/CMP0
ADC3/CMP1
I
S
S
S
S
S
S
I
I
I
I
I
*
I = Input, O = Output, S = Supply.
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