參數(shù)資料
型號: ADUC702
廠商: Analog Devices, Inc.
英文描述: 5 AMP MINIATURE POWER RELAY
中文描述: 精密模擬微控制器的12位模擬I / O,ARM7TDMI的微控制器
文件頁數(shù): 67/80頁
文件大小: 840K
代理商: ADUC702
Preliminary Technical Data
ADuC702x Series
TIMERS
Rev. PrB | Page 67 of 80
The ADuC702x has four general purpose Timer/Counters:
- Timer0,
- Timer1,
- Timer2 or Wake-up Timer,
- Timer3 or Watchdog Timer.
The four timers in their normal mode of operation can be
either free-running or periodic.
- In free-running mode the counter decrements/increments
from the maximum/minimum value until zero/full scale and
starts again at the maximum /minimum value.
- In periodic mode the counter decrements/increments from
the value in the Load Register(TxLD MMR,) until zero/full
scale and starts again at the value stored in the Load Register.
The value of a counter can be read at any time by accessing its
value register (TxVAL). Timers are started by writing in the
Control register of the corresponding timer (TxCON).
In normal mode, an IRQ is generated each time the value of the
counter reaches zero, if counting down, or full-scale, if counting
up. An IRQ can be cleared by writing any value to Clear register
of the particular timer (TxCLRI).
Timer0 – RTOS timer
Timer0 is a general purpose 16-bit count-down timer with a
programmable prescaler. The prescaler source is the core clock
frequency and can be scaled by factors of 1, 16 or 256.
Core Clock
16-bit Down Counter
Timer0 Value
16-bit Load
Timer0IRQ
Prescaler
/ 1, 16 or 256
Figure 28:timer 0 block diagram
Timer0 interface consists in four MMRS:
-
T0LD
and
T0VAL
are 16-bit registers (bit 0 to 15) and hold
16-bit unsigned integers. T0VAL is read-only.
-
T0CLRI
is an 8-bit register. Writing any value to this register
will clear the interrupt
-
T0CON
is the configuration MMR described in Table 60
below
Table 60: T0CON MMR Bit Descriptions
Bit
31-8
7
Name
Description
Reserved
Timer0 enable bit:
Set by user to enable timer 0
Cleared by user to disable timer 0. by default.
Timer 0 mode:
Set by user to operate in periodic mode
Cleared by user to operate in free-running mode. Default mode
Reserved
Prescale:
00
Core clock / 1. value by default
01
Core clock / 16
10
Core clock / 256
11
Undefined. Equivalent to 00
Reserved
6
5-4
3-2
1-0
Timer1
Timer1 is a 32-bit general purpose timer, count-down or count-
up, with a programmable prescaler. The prescaler source can be
the 32kHz Oscillator, the core clock frequency, or an external
GPIO, P1.0 or P0.6. This source can be scaled by a factor of 1,
16, 256 or 32768.
The counter can be formatted as a standard 32-bit value or as
Hours:Minutes:Seconds:Hundreths.
Timer1 has a capture register (T1CAP), which can be triggered
by a selected IRQ source initial assertion. This feature can be
used to determine the assertion of an event with more accuracy
than the precision allowed by the RTOS timer at the time the
IRQ is serviced.
Timer 1 can be used to start ADC conversions as shown in the
block diagramFigure 29.
Timer1 interface consists in five MMRS:
-
T1LD
,
T1VAL
and
T1CAP
are 32-bit registers and hold 32-
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