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參數(shù)資料
| 型號(hào)： | ADMC401-PB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Single-Chip, DSP-Based High Performance Motor Controller |
| 中文描述： | 單芯片，基于DSP的高性能電機(jī)控制器 |
| 文件頁數(shù)： | 49/60頁 |
| 文件大?。?/td> | 417K |
| 代理商： | ADMC401-PB |
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ADMC401
–49–
REV. B
Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these
bits should always be written as shown.
0
0
0
0
0
0
DM (0x2023)
EIUCTRL (R/W)
FIRST ZERO MARKER
1 = RECEIVED
0 = NOT RECEIVED
EIU COUNT
ERROR
1 = ERROR
0 = NO ERROR
EIU COUNT
DIRECTION
1 = UP
0 = DOWN
EIU
STATE
1 = NOT INITIALIZED
0 = INITIALIZED
DM (0x2022)
EIUSTAT (R)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
EIUSCALE (R/W)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
EIUCNT (R/W)
EIUMAXCNT (R/W)
EIUPERIOD (R/W)
EIUTIMER (R/W)
EETCNT (R)
DM (0x2020)
DM (0x2021)
DM (0x2024)
DM (0x2026)
DM (0x2027)
DM (0x2025)
EIS STATE
EIZ STATE
EIB STATE
1 = HI
0 = LO
DIRECTION
REVERSE
1 = SWAP EIA AND EIB
0 = DO NOT SWAP EIA/EIB
ZERO
MARKER
1 = USE FOR RESET
0 = DO NOT USE
SINGLE NORTH
MARKER MODE
1 = ENABLE
0 = DISABLE
1 = ZERO MARKER
0 = REGISTRATION
1 = ENABLE
0 = DISABLE
FREQUENCY &
DIRECTION MODE
EIA STATE
0
0
0
1 = ENABLE
0 = DISABLE
EIU ERROR
MONITORING
EIS LATCH
DEFINITION
EIZ LATCH
DEFINITION
ENABLE EIU
LOOP TIMER
EET LATCH
DEFINITION
1 = EIUTIMER TIMEOUT
0 = EIUCNT READ
1 = ENABLE
0 = DISABLE
1 = ZERO MARKER
0 = REGISTRATION
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 37. Structure of Registers of ADMC401
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