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參數(shù)資料
| 型號(hào)： | ADM9240 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Cost Microprocessor System Hardware Monitor |
| 中文描述： | 低成本的微處理器系統(tǒng)硬件監(jiān)視器 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大小： | 280K |
| 代理商： | ADM9240 |
–3–
REV. 0
ADM9240
Parameter
Min
T yp
Max
Units
T est Conditions/Comments
OPEN-DRAIN SERIAL DAT A BUS
OUT PUT (SDA)
Output Low Voltage, V
OL
0.4
V
I
OUT
= –3.0 mA,
V
CC
= 4.25 V–5.75 V
I
OUT
= –3.0 mA
V
CC
= 2.85 V–3.45 V
V
OUT
= V
CC
0.4
V
High Level Output Current, I
OH
0.1
100
μ
A
SERIAL BUS DIGIT AL INPUT S
(SCL, SDA)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
0.7
×
V
CC
V
V
mV
0.3
×
V
CC
500
DIGIT AL INPUT LOGIC LEVELS
(A0, A1, CI,
RESET
, VID0 – VID4,
FAN1, FAN2)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input High Voltage, V
IH
Input Low Voltage, V
IL
NT EST _IN
Input High Voltage, V
IH
Input High Voltage, V
IH
2.4
V
V
V
V
V
CC
= 4.25 V–5.75 V
V
CC
= 4.25 V–5.75 V
V
CC
= 2.85 V–3.45 V
V
CC
= 2.85 V–3.45 V
0.8
2.0
0.4
2.4
2.0
V
V
V
CC
= 4.25 V–5.75 V
V
CC
= 2.85 V–3.45 V
DIGIT AL INPUT CURRENT
Input High Current, I
IH
Input High Current, A0, A1, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
SERIAL BUS T IMING
7
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free T ime, t
BUF
Start Setup T ime, t
SU;ST A
Start Hold T ime, t
HD;ST A
SCL Low T ime, t
LOW
SCL High T ime, t
HIGH
SCL, SDA Rise T ime, t
R
SCL, SDA Fall T ime, t
F
Data Setup T ime, t
SU;DAT
Data Hold T ime, t
HD;DAT
–1
–200
μ
A
μ
A
μ
A
pF
V
IN
= V
CC
V
IN
= V
CC
(Note 6)
V
IN
= 0
75
1
20
400
50
kHz
ns
μ
s
ns
ns
μ
s
μ
s
ns
μ
s
ns
ns
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
1.3
600
600
1.3
0.6
300
300
100
900
NOT ES
1
All voltages are measured with respect to GND, unless otherwise noted.
2
T ypicals are at T
A
= +25
°
C and represent most likely parametric norm. Shutdown current typ is measured with V
CC
= 3.3 V.
3
T UE (T otal Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC, multiplexer and on-chip input attenuators, including an external series input
protection resistor value between zero and 1 k
.
4
T otal monitoring cycle time is the time taken to measure all six analog inputs plus the temperature sensor.
5
T he total fan count is based on 2 pulses per revolution of the fan tachometer output.
6
A0 and A1 have internal 75 k
pull-down.
7
T iming specifications are tested at logic levels of V
IL
= 0.3
×
V
CC
for a falling edge and V
IH
= 0.7
×
V
CC
for a rising edge.
Specifications subject to change without notice.
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