參數(shù)資料
型號: ADAU1702JSTZ
廠商: Analog Devices Inc
文件頁數(shù): 28/52頁
文件大?。?/td> 0K
描述: IC AUDIO PROC 2ADC/4DAC 48-LQFP
標(biāo)準(zhǔn)包裝: 1
系列: SigmaDSP®
類型: 音頻處理器
應(yīng)用: 車載,監(jiān)視器,MP3
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁面: 776 (CN2011-ZH PDF)
ADAU1702
Rev. C | Page 34 of 52
CONTROL REGISTER DETAILS
ADDRESS 2048 TO ADDRESS 2055 (0x0800 TO
0x0807)—INTERFACE REGISTERS
The interface registers are used in self-boot mode to save
parameters that need to be written to the external EEPROM.
The ADAU1702 then recalls these parameters from the
EEPROM after the next reset or power-up. Therefore, system
parameters such as volume and EQ settings can be saved during
power-down and recalled the next time the system is turned on.
There are eight 32-bit interface registers, which allow eight 28-bit
(plus zero padding) parameters to be saved. The parameters to
be saved in these registers are selected in the graphical
programming tools. These registers are updated with their
corresponding parameter RAM data once per sample period.
An edge, which can be set to be either rising or falling, triggers
the ADAU1702 to write the current contents of the interface
registers to the EEPROM. See the Self-Boot section for details.
The user can write directly to the interface registers after the
interface registers control port write mode (IFCW) in the DSP core
control register has been set. In this mode, the data in the registers
is written from the control port, not from the DSP core.
Table 31. Interface Register Bit Map
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default
0
IF27
IF26
IF25
IF24
IF23
IF22
IF21
IF20
IF19
IF18
IF17
IF16
0x0000
IF15
IF14
IF13
IF12
IF11
IF10
IF09
IF08
IF07
IF06
IF05
IF04
IF03
IF02
IF01
IF00
0x0000
Table 32.
Bit Name
Description
IF[27:0]
Interface register 28-bit parameter
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