參數(shù)資料
型號(hào)： ADAU1702JSTZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 5/52頁(yè)
文件大?。?/td> 0K
描述： IC AUDIO PROC 2ADC/4DAC 48-LQFP
標(biāo)準(zhǔn)包裝： 2,000
系列： SigmaDSP®
類型： 音頻處理器
應(yīng)用： 車載，監(jiān)視器，MP3
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
ADAU1702
Rev. C | Page 13 of 52
Pin No.
Mnemonic
Type 1
Description
33
PGND
PWR
PLL Ground Pin. The AGND, DGND, and PGND pins can be tied directly together in a
common ground plane. Decouple PGND to PVDD with a 100 nF capacitor.
34
PVDD
PWR
3.3 V Power Supply for the PLL and the Auxiliary ADC Analog Section. Decouple this pin
should to PGND with a 100 nF capacitor.
35
PLL_LF
A_OUT
PLL Loop Filter Connection. Two capacitors and a resistor need to be connected to this pin, as
shown in Figure 15. See the Setting Master Clock/PLL Mode section for more details.
36, 48
AVDD
PWR
3.3 V Analog Supply. Decouple this pin to AGND with a 100 nF capacitor.
38, 39
PLL_MODE0,
PLL_MODE1
D_IN
PLL Mode Setting. PLL_MODE0 and PLL_MODE1 set the output frequency of the master
clock PLL. See the Setting Master Clock/PLL Mode section for more details.
40
CM
A_OUT
1.5 V Common-Mode Reference. Connect a 47 μF decoupling capacitor between this pin
and ground to reduce crosstalk between the ADCs and DACs. The material of the capacitors is
not critical. This pin can be used to bias external analog circuits, as long as those circuits are
not drawing current from the pin (such as when CM is connected to the noninverting
input of an op amp).
41
FILTD
A_OUT
DAC Filter Decoupling Pin. Connect a 10 μF capacitor between this pin and ground. The
capacitor material is not critical. The voltage on this pin is 1.5 V.
43
VOUT3
A_OUT
VOUT3 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACs section
for details.
44
VOUT2
A_OUT
VOUT2 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACs section
for details.
45
VOUT1
A_OUT
VOUT1 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACs section
for details.
46
VOUT0
A_OUT
VOUT0 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACs section
for details.
47
FILTA
A_OUT
ADC Filter Decoupling Pin. Connect a 10 μF capacitor between this pin and ground. The
capacitor material is not critical. The voltage on this pin is 1.5 V.
1 PWR is power/ground, A_IN is analog input, D_IN is digital input, A_OUT is analog output, D_IO is digital input/output, D_IO is digital input/output, A_IO is analog
input/output, and N/A is not applicable.
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