參數(shù)資料
型號: ADAU1442YSVZ-3A
廠商: Analog Devices Inc
文件頁數(shù): 62/93頁
文件大小: 0K
描述: IC SIGMADSP 28B 175MHZ 100TQFP
標(biāo)準(zhǔn)包裝: 1
系列: SigmaDSP®
類型: 音頻處理器
應(yīng)用: 車載音頻
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
ADAU1442/ADAU1445/ADAU1446
Data Sheet
Rev. D | Page 64 of 92
RAMS
program RAM, 4k words of parameter RAM, and 8k words of
data RAM.
Program RAM
Table 48. Register Details of Program RAM
Address
Name
Read/Write
Word Length
Decimal
Hex
8192
2000
Program RAM
43 bits (6 bytes)
The program RAM contains the 43-bit operation codes that are
executed by the core. It is important to note that although the
length of the RAM is 4096, only 3584 instructions can be
executed in the span of a single frame for normal rate signals.
For dual-rate processing, the maximum allowable instruction
count is 1792, and for quad-rate processing, the maximum
allowable instruction count is 896. For more information on
setting the DSP core rate, see the DSP Core Rate Select Register
The additional program space can be used with optimized
algorithms and jump commands. The SigmaStudio compiler
calculates maximum instructions per frame for a project and
generates an error when the value exceeds the maximum allowable
instructions per frame based on the sample rate of the signals in
the core.
Because the end of a program contains a jump-to-start command,
the remaining program RAM space does not need to be filled
with no-operation (NOP) commands.
Program Counter Peak Count Register (Address 0xE229)
Table 49. Bit Descriptions of Register 0xE229
Bit Position
Description
[15:0]
Program counter peak count (read only)
This 16-bit, read-only register keeps track of how many cycles
elapse from the start of the program until the program counter
is reset. The register is updated on every start pulse.
This register should not be used if the watchdog error sticky bit
has been activated, which indicates that the maximum allowable
clock cycles per frame have been exceeded. In this case, the
program counter peak value may be inaccurate.
Parameter RAM
Table 50. Register Details of Parameter RAM
Address
Name
Read/Write
Word Length
Decimal
Hex
0
0000
Parameter RAM
28 bits (4 bytes)
The parameter RAM contains all 28-bit values that are used by
algorithms running in the DSP core. SigmaStudio automatically
assigns the first eight positions to safeload parameters; therefore,
project-specific parameters start at Address 0x0008.
Data RAM
Table 51. Register Details of Data RAM
Address
Name
Read/Write
Word Length
Decimal
Hex
16384
4000
Data RAM
28 bits (4 bytes)
The data RAM stores audio data that must be accessed by the
core for more than one frame. Unlike previous generations of
SigmaDSP architectures, which used a hardware-based modulo
software-based modulo scheme that is controlled by the
programmer.
The data RAM should be initialized to all 0s before a boot-up
operation is performed to avoid an undefined startup state.
SigmaStudio inserts the appropriate data RAM initialization
code into projects by default.
Modulo Data Memory Register (Address 0xE21F)
Table 52. Bit Descriptions of Register 0xE21F
Bit
Position
Description
Default
[15:14]
Reserved.
[13:0]
Nonmodulo data memory start.
The setting is the address in
memory.
01111100000000
This is a single 14-bit register that sets the start of the nonmodulo
space of the data memory. The default value is 7936 decimal.
SigmaStudio sets this value by default based on the addressing
scheme used in the SigmaStudio project. The value should not
be modified by the user.
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