參數(shù)資料
型號： ADAU1442YSVZ-3A-RL
廠商： Analog Devices Inc
文件頁數(shù)： 8/93頁
文件大?。?/td> 0K
描述： IC SIGMADSP 28B 175MHZ 100TQFP
標(biāo)準(zhǔn)包裝： 1,000
系列： SigmaDSP®
類型： 音頻處理器
應(yīng)用： 車載音頻
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 帶卷 (TR)
Data Sheet
ADAU1442/ADAU1445/ADAU1446
Rev. D | Page 15 of 92
Pin No.
Mnemonic
Type1
Description
66
SDATA_OUT7
D_OUT
Serial Data Port 7 Output. When not used, this pin can be left disconnected.
67
BCLK10
D_IO
Bit Clock, Output Clock Domain 10. This pin is bidirectional, with the direction depending on whether
the Output Clock Domain 10 is set up as a master or slave. When not used, this pin can be left
disconnected.
68
LRCLK10
D_IO
Frame Clock, Output Clock Domain 10. This pin is bidirectional, with the direction depending on
whether the Output Clock Domain 10 is set up as a master or slave. When not used, this pin can be
left disconnected.
69
SDATA_OUT6
D_OUT
Serial Data Port 6 Output. When not used, this pin can be left disconnected.
70
BCLK9
D_IO
Bit Clock, Output Clock Domain 9. This pin is bidirectional, with the direction depending on whether the
Output Clock Domain 9 is set up as a master or slave. When not used, this pin can be left disconnected.
71
LRCLK9
D_IO
Frame Clock, Output Clock Domain 9. This pin is bidirectional, with the direction depending on
whether the Output Clock Domain 9 is set up as a master or slave. When not used, this pin can be
left disconnected.
72
SDATA_OUT5
D_OUT
Serial Data Port 5 Output. When not used, this pin can be left disconnected.
73
SDATA_IN8
D_IN
Serial Data Port 8 Input. When not used, this pin can be left disconnected.
74
BCLK8
D_IO
Bit Clock, Input/Output Clock Domain 8. This pin is bidirectional, with the direction depending on
whether the Input/Output Clock Domain 8 is set up as a master or slave. When not used, this pin
can be left disconnected.
78
LRCLK8
D_IO
Frame Clock, Input/Output Clock Domain 8. This pin is bidirectional, with the direction depending
on whether the Input/Output Clock Domain 8 is set up as a master or slave. When not used, this
pin can be left disconnected.
79
SDATA_OUT4
D_OUT
Serial Data Port 4 Output. When not used, this pin can be left disconnected.
80
SDATA_IN7
D_IN
Serial Data Port 7 Input. When not used, this pin can be left disconnected.
81
BCLK7
D_IO
Bit Clock, Input/Output Clock Domain 7. This pin is bidirectional, with the direction depending on
whether the Input/Output Clock Domain 7 is set up as a master or slave. When not used, this pin
can be left disconnected.
82
LRCLK7
D_IO
Frame Clock, Input/Output Clock Domain 7. This pin is bidirectional, with the direction depending
on whether the Input/Output Clock Domain 7 is set up as a master or slave. When not used, this
pin can be left disconnected.
83
SDATA_OUT3
D_OUT
Serial Data Port 3 Output. When not used, this pin can be left disconnected.
84
SDATA_IN6
D_IN
Serial Data Port 6 Input. When not used, this pin can be left disconnected.
85
BCLK6
D_IO
Bit Clock, Input/Output Clock Domain 6. This pin is bidirectional, with the direction depending on
whether the Input/Output Clock Domain 6 is set up as a master or slave. When not used, this pin
can be left disconnected.
86
LRCLK6
D_IO
Frame Clock, Input/Output Clock Domain 6. This pin is bidirectional, with the direction depending
on whether the Input/Output Clock Domain 6 is set up as a master or slave. When not used, this
pin can be left disconnected.
90
SDATA_OUT2
D_OUT
Serial Data Port 2 Output. When not used, this pin can be left disconnected.
91
SDATA_IN5
D_IN
Serial Data Port 5 Input. When not used, this pin can be left disconnected.
92
BCLK5
D_IO
Bit Clock, Input/Output Clock Domain 5. This pin is bidirectional, with the direction depending on
whether the Input/Output Clock Domain 5 is set up as a master or slave. When not used, this pin
can be left disconnected.
93
LRCLK5
D_IO
Frame Clock, Input/Output Clock Domain 5. This pin is bidirectional, with the direction depending
on whether the Input/Output Clock Domain 5 is set up as a master or slave. When not used, this
pin can be left disconnected.
94
SDATA_OUT1
D_OUT
Serial Data Port 1 Output. When not used, this pin can be left disconnected.
95
SDATA_IN4
D_IN
Serial Data Port 4 Input. When not used, this pin can be left disconnected.
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ADAU1445YSVZ-3A-RL 功能描述:IC SIGMADSP 175MHZ 100TQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1446EBZ 制造商:Analog Devices 功能描述:SIGMADSP? DIGITAL AUDIO PROCESSOR WITH FLEXIBLE AUDIO - Bulk
ADAU1446YSTZ-3A 功能描述:IC SIGMADSP 175MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1446YSTZ-3A-RL 功能描述:IC SIGMADSP 175MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
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