參數(shù)資料
型號: ADAU1461WBCPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 1/88頁
文件大小: 0K
描述: IC SIGMADSP 24BIT 96KHZ PLL 32
標(biāo)準(zhǔn)包裝: 1,500
系列: SigmaDSP®
類型: 音頻處理器
應(yīng)用: 車載音頻
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ
包裝: 帶卷 (TR)
SigmaDSP Stereo, Low Power, 96 kHz,
24-Bit Audio Codec with Integrated PLL
ADAU1461
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
FEATURES
SigmaDSP 28-/56-bit, 50 MIPS digital audio processor
Fully programmable with SigmaStudio graphical tool
24-bit stereo audio ADC and DAC: >98 dB SNR
Sampling rates from 8 kHz to 96 kHz
Low power: 17 mW record, 18 mW playback, 48 kHz
6 analog input pins, configurable for single-ended or
differential inputs
Flexible analog input/output mixers
Stereo digital microphone input
Analog outputs: 2 differential stereo, 2 single-ended stereo,
1 mono headphone output driver
PLL supporting input clocks from 8 MHz to 27 MHz
Analog automatic level control (ALC)
Microphone bias reference voltage
Analog and digital I/O: 3.3 V
I2C and SPI control interfaces
Digital audio serial data I/O: stereo and time-division
multiplexing (TDM) modes
Software-controllable clickless mute
GPIO pins for digital controls and outputs
32-lead, 5 mm × 5 mm LFCSP
40°C to +105°C operating temperature range
Qualified for automotive applications
APPLICATIONS
Automotive head units
Automotive amplifiers
Navigation systems
Rear-seat entertainment systems
GENERAL DESCRIPTION
The ADAU1461 is a low power, stereo audio codec with
integrated digital audio processing that supports stereo 48 kHz
record and playback at 35 mW from a 3.3 V analog supply. The
stereo audio ADCs and DACs support sample rates from 8 kHz
to 96 kHz as well as a digital volume control.
The SigmaDSP core features 28-bit processing (56-bit double
precision). The processor allows system designers to compensate
for the real-world limitations of microphones, speakers, amplifiers,
and listening environments, resulting in a dramatic improvement
in the perceived audio quality through equalization, multiband
compression, limiting, and third-party branded algorithms.
The SigmaStudio graphical development tool is used to program
the ADAU1461. This software includes audio processing blocks
such as filters, dynamics processors, mixers, and low level DSP
functions for fast development of custom signal flows.
The record path includes an integrated microphone bias circuit
and six inputs. The inputs can be mixed and muxed before the
ADC, or they can be configured to bypass the ADC. The
ADAU1461 includes a stereo digital microphone input.
The ADAU1461 includes five high power output drivers (two
differential and three single-ended), supporting stereo head-
phones, an earpiece, or other output transducer. AC-coupled
or capless configurations are supported. Individual fine level
controls are supported on all analog outputs. The output mixer
stage allows for flexible routing of audio.
FUNCTIONAL BLOCK DIAGRAM
CM
IOV
D
DG
ND
DV
D
DO
UT
AG
ND
AV
D
AV
D
AG
ND
HP JACK
DETECTION
REGULATOR
INPUT
MIXERS
ALC
MICROPHONE
BIAS
PLL
LINN
LINP
LAUX
JACKDET/MICIN
RINP
RINN
RAUX
LHP
LOUTN
LOUTP
ADAU1461
RHP
MONOOUT
ROUTP
ROUTN
MICBIAS
OUTPUT
MIXERS
DAC
DIGITAL
FILTERS
ADC
DIGITAL
FILTERS
DAC
ADC
DAC
ADC
SDA/
COUT
I2C/SPI
CONTROL PORT
SERIAL DATA
INPUT/OUTPUT PORTS
MCLK
A
DC
_S
D
A
TA
/
GP
IO1
BC
LK
/
GP
IO2
SCL/
CCLK
ADDR1/
CDATA
ADDR0/
CLATCH
L
RCL
K
/
GP
IO3
DA
C_
S
DA
T
A/
GP
IO0
89
14-
0
01
0
Figure 1.
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