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| 型號： | AD9991KCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 56-LFCSP |
| 標準包裝： | 1 |
| 類型： | CCD 信號處理器，10 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 帶卷 (TR) |
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AD9991
–17–
Vertical Pattern Groups (VPAT)
The vertical pattern groups dene the individual pulse patterns
for each V1–V6 output signal. Table V summarizes the registers
available for generating each of the 10 V-pattern groups. The start
polarity (VPOL) determines the starting polarity of the ver ti-
cal sequence, and can be prog rammed high or low for
each V1–V6 output. The rst, second, and third toggle posi-
tion (VTOG1, VTOG2, VTOG3) are the pixel locations within
the line where the pulse transitions. A fourth toggle position
(VTOG4) is also available for V-Pattern Groups 8 and 9. All tog-
gle positions are 12-bit values, allowing their placement anywhere
in the horizontal line. A separate register, VPATSTART, species
the start position of the V-pattern group within the line (see the
Vertical Sequences section). The VPATLEN register designates
the total length of the V-pattern group, which will determine the
number of pixels between each of the pattern repetitions, when
repetitions are used (see the Vertical Sequences section).
The FREEZE and RESUME registers are used to temporarily
stop the operation of the V1–V6 outputs. At the pixel location
specied in the FREEZE register, the V1–V6 outputs will be
held static at their current dc state, high or low. The V1–V6
outputs are held until the pixel location specied by RESUME
register. Two sets of FREEZE/RESUME registers are pro-
vided, allowing the vertical outputs to be interrupted twice in
the same line. The FREEZE and RESUME positions are pro-
grammed in the V-pattern group registers, but are separately
enabled using the VMASK registers, which are described in the
Vertical Sequence section.
Table V. Vertical Pattern Group Registers
Register
Length
Range
Description
VPOL
1b
High/Low
Starting Polarity of Each V1–V6 Output
VTOG1
12b
0–4096 Pixel Location
First Toggle Position within Line for Each V1–V6 Output
VTOG2
12b
0–4096 Pixel Location
Second Toggle Position within Line for Each V1–V6 Output
VTOG3
12b
0–4096 Pixel Location
Third Toggle Position within Line for Each V1–V6 Output
VTOG4
12b
0–4096 Pixel Location
Fourth Toggle Position, only Available in V-Pattern Groups 8 and 9
VPATLEN
12b
0–4096 Pixels
Total Length of Each V-Pattern Group
FREEZE1
12b
0–4096 Pixel Location
Holds the V1–V6 Outputs at Their Current Levels (Static DC)
RESUME1
12b
0–4096 Pixel Location
Resumes Operation of the V1–V6 Outputs to Finish Their Pattern
FREEZE2
12b
0–4096 Pixel Location
Holds the V1–V6 Outputs at Their Current Levels (Static DC)
RESUME2
12b
0–4096 Pixel Location
Resumes Operation of the V1–V6 Outputs to Finish Their Pattern
HD
V1
PROGRAMMABLE SETTINGS FOR EACH V-PATTERN:
1. START POLARITY
2. FIRST TOGGLE POSITION
3. SECOND TOGGLE POSITION (THIRD TOGGLE POSITION ALSO AVAILABLE, FOURTH TOGGLE POSITION AVAILABLE FOR V-PATTERN GROUPS 8 AND 9)
4. TOTAL PATTERN LENGTH FOR ALL V1–V6 OUTPUTS
START POSITION OF V-PATTERN GROUP IS PROGRAMMABLE IN V-SEQUENCE REGISTERS
4
1
2
3
V2
1
2
3
V6
1
2
3
Figure 16. Vertical Pattern Group Programmability
REV. 0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9991KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9992 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator |
| AD9992_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator |
| AD9992BBCZ | 功能描述:IC CCD SGNL PROC 12BIT 105CSPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9992BBCZRL | 功能描述:IC CCD SGNL PROC 12BIT 105CSPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
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