參數(shù)資料
型號(hào)： AD9929
廠商： Analog Devices, Inc.
英文描述： CCD Signal Processor with Precision Timing Generator
中文描述： CCD信號(hào)處理器精確時(shí)序發(fā)生器
文件頁(yè)數(shù)： 54/64頁(yè)
文件大?。?/td> 558K
代理商： AD9929
AD9929
POWER SUPPLY SEQUENCING
The recommended power-up and power-down sequences are
shown in Figure 64 and Figure 65, respectively. As shown, the
VM1 and VM2 voltage level should never exceed the VH1 and
VH2 voltage level during power-up or power-down. Excessive
current results if this requirement is not met due to a PN
junction diode turning on between the VM1/2 and VH supply
pins.
Rev. A | Page 54 of 64
Figure 63 describes the AD9929 AFETG and V-driver supplies
associated with vertical driver outputs.
TIMING
GENERATOR
XV1
V-DRIVER
LOGIC
XV2
XV3
XV4
XVSG1
XSUBCK
V1 (VH1, VM1, VL)
V2 (VM2, VL)
V3 (VH1, VM1, VL)
V4 (VM2, VL)
SUBCK (VH2, VL)
V
V
V
V
V
A
H
D
XVSG2
V
0
Figure 63. Block Diagram of AD9929 Showing
Timing Generator and Vertical Driver
RECOMMENDED POWER-UP SUPPLY
SEQUENCING
When the AD9929 is powered up, the following power supply
sequence is recommended. Refer to Figure 64.
1.
Turn ON: VDD, DVDD, DRVDD, HVDD, RGVDD,
TCVDD, and AVDD.
2.
Turn ON: VH1 VH2, VM1,VM2, and VL.
Caution
:
There is a PN junction diode from VM1 and VM2 to VH.
Excessive current occurs if the VM1 and VM2 supply level is
greater than VH1 and VH2 supplies.
RECOMMENDED POWER-DOWN SUPPLY
SEQUENCING
When the AD9929 is powered down, the following power
supply sequence is recommended. Refer to Figure 65.
1.
Turn OFF: VH1, VH2, VM1, VM2, and VL.
2.
Turn OFF: VDD, DVDD, DRVDD, HVDD, RGVDD,
TCVDD, and AVDD.
0V
1
2
VH1 = VH2 = 15.0V
VDD = DVDD = DRVDD = HVDD = RGVDD = TCVDD = AVDD = 3V
VM1 = VM2 = –0.5V
VL = –7.5V
SAME TIME AS VM AND VH OR EARLIER, BUT NOT BEFORE VDD REACHES 3V.
Figure 64. Power-Up Supply Sequencing
0
0V
2
1
VH1 = VH2 = 15.0V
VDD = DVDD = DRVDD = HVDD = RGVDD = TCVDD = AVDD = 3V
VM1 = VM2 = –0.5V
VL = –7.5V
SAME TIME AS VM AND VH OR EARLIER, BUT NOT AFTER VDD.
Figure 65. Power-Down Supply Sequencing
0
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