參數(shù)資料
型號(hào)： AD9929
廠商： Analog Devices, Inc.
英文描述： CCD Signal Processor with Precision Timing Generator
中文描述： CCD信號(hào)處理器精確時(shí)序發(fā)生器
文件頁(yè)數(shù)： 26/64頁(yè)
文件大?。?/td> 558K
代理商： AD9929
AD9929
Rev. A | Page 26 of 64
P[0]
PIXEL
PERIOD
RG
H1
RGf[12]
P[48] = P[0]
Hf[24]
SHP[20]
CCD
SIGNAL
P[24]
P[12]
P[36]
Hr[0]
RGr[0]
SHD[40]
POSITION
NOTES
1. ALL SIGNAL EDGES ARE FULLY PROGRAMMABLE TO ANY OF THE 48 POSITIONS WITHIN ONE PIXEL PERIOD.
2. DEFAULT POSITIONS FOR EACH SIGNAL ARE SHOWN.
CDS
(INTERNAL)
t
S1
0
Figure 17. High Speed Clock Default and Programmable Locations
FIXED CROSSOVER VOLTAGE
H1
H2
t
PD
t
RISE
t
PD
<
t
RISE
H2
H1
0
Figure 18. H-Clock Inverse Phase Relationship
P[12]
P[24]
NOTES
1. DCLK1 PHASE IS ADJUSTED BY SETTING THE DCLKPHASE REGISTER (ADDRESS 0x02)
2. DOUT PHASE CAN BE ADJUSTED BY SETTING THE DOUTPHASE REGISTER (ADDRESS 0x02)
Figure 19. Digital Output Phase Adjustment
DIGITAL DATA OUTPUTS
The AD9929 DOUT[11:0] and DCLK phases are independently
programmable using the DOUTPHASE register (Address 0x02)
P[0]
P[48] = P[0]
PIXEL
PERIOD
P[36]
DOUT
DCLK1
t
OD
0
and DCLKPHASE register (Address 0x02). Refer to Figure 19.
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