參數(shù)資料
型號： AD9923ABBCZRL
廠商： Analog Devices Inc
文件頁數(shù)： 82/84頁
文件大?。?/td> 0K
描述： IC PROCESSOR CCD 12BIT 105CSPBGA
標準包裝： 2,000
類型： CCD 信號處理器，12 位
輸入類型： 邏輯
輸出類型： 邏輯
接口： 3 線串口
電流 - 電源： 20mA
安裝類型： 表面貼裝
封裝/外殼： 105-LFBGA，CSPBGA
供應商設備封裝： 105-CSPBGA（8x8）
包裝： 帶卷 (TR)
AD9923A
Rev. A | Page 83 of 84
Table 58. Field Registers
Address
(Hex)
Data Bits
Default
Value
Update
Type
Name
Description
00
[4:0]
Undefined
VD
SEQ0
Selected V-sequence for first region in the field.
[9:5]
Undefined
SEQ1
Selected V-sequence for second region in the field.
[14:10]
Undefined
SEQ2
Selected V-sequence for third region in the field .
[19:15]
Undefined
SEQ3
Selected V-sequence for fourth region in the field.
[24:20]
Undefined
SEQ4
Selected V-sequence for fifth region in the field.
01
[4:0]
Undefined
VD
SEQ5
Selected V-sequence for sixth region in the field.
[9:5]
Undefined
SEQ6
Selected V-sequence for seventh region in the field.
[14:10]
Undefined
SEQ7
Selected V-sequence for eighth region in the field.
[19:15]
Undefined
SEQ8
Selected V-sequence for ninth region in the field.
02
[1:0]
Undefined
VD
MULT_SWEEP0
Enables multiplier mode and/or sweep mode for Region 0.
0: multiplier off/sweep off.
1: multiplier off/sweep on.
2: multiplier on/sweep off.
3: multiplier on/sweep on.
[3:2]
Undefined
MULT_SWEEP1
Enables multiplier mode and/or sweep mode for Region 1.
[5:4]
Undefined
MULT_SWEEP2
Enables multiplier mode and/or sweep mode for Region 2.
[7:6]
Undefined
MULT_SWEEP3
Enables multiplier mode and/or sweep mode for Region 3.
[9:8]
Undefined
MULT_SWEEP4
Enables multiplier mode and/or sweep mode for Region 4.
[11:10]
Undefined
MULT_SWEEP5
Enables multiplier mode and/or sweep mode for Region 5.
[13:12]
Undefined
MULT_SWEEP6
Enables multiplier mode and/or sweep mode for Region 6.
[15:14]
Undefined
MULT_SWEEP7
Enables multiplier mode and/or sweep mode for Region 7.
[17:16]
Undefined
MULT_SWEEP8
Enables multiplier mode and/or sweep mode for Region 8.
03
[11:0]
Undefined
VD
SCP0
V-Sequence Change Position 0.
[12]
Undefined
Unused
Must be set to 0.
[24:13]
Undefined
SCP1
V-Sequence Change Position 1.
04
[11:0]
Undefined
VD
SCP2
V-Sequence Change Position 2.
[12]
Undefined
Unused
Must be set to 0.
[24:13]
Undefined
SCP3
V-Sequence Change Position 3.
05
[11:0]
Undefined
VD
SCP4
V-Sequence Change Position 4.
[12]
Undefined
Unused
Must be set to 0.
[24:13]
Undefined
SCP5
V-Sequence Change Position 5.
06
[11:0]
Undefined
VD
SCP6
V-Sequence Change Position 6.
[12]
Undefined
Unused
Must be set to 0.
[24:13]
Undefined
SCP7
V-Sequence Change Position 7.
07
[11:0]
Undefined
VD
SCP8
V-Sequence Change Position 8.
[12]
Undefined
Unused
Must be set to 0.
[24:13]
Undefined
VDLEN
VD field length (number of lines in the field).
08
[12:0]
Undefined
VD
HDLAST
HD last line length. Line length of last line in the field.
[25:13]
Undefined
VSTARTSECOND
Start position for second V-pattern on SG active line.
09
[4:0]
Undefined
VD
VPATSECOND
Selected second V-pattern group for SG active line.
[20:5]
Undefined
SGMASK
Masking of VSG outputs during SG active line.
0A
[23:0]
Undefined
VD
SGPATSEL
Selection of VSG patterns for each VSG output.
0B
[11:0]
Undefined
VD
SGACTLINE1
SG Active Line 1.
[12]
Undefined
Unused
Must be set to 0.
[24:13]
Undefined
SGACTLINE2
SG Active Line 2.
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