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參數(shù)資料
| 型號(hào)： | AD9923ABBCZRL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 5/84頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR CCD 12BIT 105CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | CCD 信號(hào)處理器，12 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 電流 - 電源： | 20mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 105-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 105-CSPBGA（8x8） |
| 包裝： | 帶卷 (TR) |
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AD9923A
Rev. A | Page 13 of 84
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Therefore,
every code must have a finite width. No missing codes guaranteed
to 12-bit resolution indicates that all 4096 codes, respectively,
must be present over all operating conditions.
Integral Nonlinearity (INL)
The deviation of each code measured from a true straight line
between the zero and full-scale values. The point used as zero
scale occurs 0.5 LSB before the first code transition. Positive full
scale is defined as a level 1.5 LSB beyond the last code transition.
The deviation is measured from the middle of each output code
to the true straight line.
Peak Nonlinearity
Peak nonlinearity, a full signal chain specification, refers to the
peak deviation of the AD9923A output from a true straight line.
The point used as zero scale occurs 0.5 LSB before the first code
transition. Positive full scale is defined as a level 1.5 LSB beyond
the last code transition. The deviation is measured from the
middle of each output code to the true straight line. The error is
expressed as a percentage of the 2 V ADC full-scale signal. The
input signal is always appropriately gained up to fill the full-scale
range of the ADC.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSB, and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be
converted to an equivalent voltage, using the relationship
1 LSB = (ADC full scale/2n codes)
where n is the bit resolution of the ADC and 1 LSB is 0.488 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. The PSR specification is calculated from the change in the
data outputs for a given step change in the supply voltage.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9923BBCZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9923BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9924BBCZ | 制造商:Analog Devices 功能描述: |
| AD9924BBCZRL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9925 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CCD Signal Processor with Vertical Driver and Precision Timing Generator |
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