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參數(shù)資料
| 型號： | AD9854/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 34/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9854 |
| 產品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 設計資源： | AD9854 Eval Brd Schematic AD9854 Eval Brd BOM |
| 標準包裝： | 1 |
| 系列： | AgileRF™ |
| 主要目的： | 計時，直接數(shù)字合成（DDS） |
| 已用 IC / 零件： | AD9854 |
| 已供物品： | 板 |
| 相關產品： | AD9854ASTZ-ND - IC DDS QUADRATURE CMOS 80-LQFP |
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AD9854
Rev. E | Page 4 of 52
GENERAL DESCRIPTION
The AD9854 digital synthesizer is a highly integrated device
that uses advanced DDS technology, coupled with two internal
high speed, high performance quadrature DACs to form a digitally
programmable I and Q synthesizer function. When referenced
to an accurate clock source, the AD9854 generates highly stable,
frequency-phase, amplitude-programmable sine and cosine
outputs that can be used as an agile LO in communications, radar,
and many other applications. The innovative high speed DDS core
of the AD9854 provides 48-bit frequency resolution (1 μHz tuning
resolution with 300 MHz SYSCLK). Maintaining 17 bits ensures
excellent SFDR.
The circuit architecture of the AD9854 allows the generation of
simultaneous quadrature output signals at frequencies up to
150 MHz, which can be digitally tuned at a rate of up to
100 million new frequencies per second. The sine wave output
(externally filtered) can be converted to a square wave by the
internal comparator for agile clock generator applications.
The device provides two 14-bit phase registers and a single pin
for BPSK operation.
For higher-order PSK operation, the I/O interface can be used
for phase changes. The 12-bit I and Q DACs, coupled with the
innovative DDS architecture, provide excellent wideband and
narrow-band output SFDR. The Q DAC can also be configured
as a user-programmable control DAC if the quadrature function
is not desired. When configured with the comparator, the 12-bit
control DAC facilitates static duty cycle control in high speed
clock generator applications.
Two 12-bit digital multipliers permit programmable amplitude
modulation, on/off output shaped keying, and precise amplitude
control of the quadrature output. Chirp functionality is also
included to facilitate wide bandwidth frequency sweeping
applications. The programmable 4× to 20× REFCLK multiplier
circuit of the AD9854 internally generates the 300 MHz system
clock from an external lower frequency reference clock. This
saves the user the expense and difficulty of implementing a
300 MHz system clock source.
Direct 300 MHz clocking is also accommodated with either single-
ended or differential inputs. Single-pin conventional FSK and
the enhanced spectral qualities of ramped FSK are supported.
The AD9854 uses advanced 0.35 μm CMOS technology to
provide a high level of functionality on a single 3.3 V supply.
The AD9854 is pin-for-pin compatible with the AD9852 single-
tone synthesizer. It is specified to operate over the extended
industrial temperature range of 40°C to +85°C.
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