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參數(shù)資料
| 型號(hào)： | AD9854/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9854 |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 設(shè)計(jì)資源： | AD9854 Eval Brd Schematic AD9854 Eval Brd BOM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | AgileRF™ |
| 主要目的： | 計(jì)時(shí)，直接數(shù)字合成（DDS） |
| 已用 IC / 零件： | AD9854 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD9854ASTZ-ND - IC DDS QUADRATURE CMOS 80-LQFP |
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AD9854
Rev. E | Page 28 of 52
h, it
s phase
put carrier.
2.
o Phase
ster 2.
4.
Activate the I/O update clock when ready.
ct
1
using the serial or high speed parallel programming bus.
Continue chirp by immediately returning to the beginning
frequency (F1) in a sawtooth fashion, and then repeating the
previous chirp process using the CLR ACC1 control bit.
An automatic, repeating chirp can be set up by using the
32-bit update clock to issue the CLR ACC1 command at
precise time intervals. Adjusting the timing intervals or
changing the delta frequency word changes the chirp
range. It is incumbent upon the user to balance the chirp
duration and frequency resolution to achieve the proper
frequency range.
BPSK (Mode 100)
Binary, biphase, or bipolar phase shift keying is a means to
rapidly select between two preprogrammed 14-bit output phase
offsets that equally affect both the I and Q outputs of the
AD9854. The logic state of Pin 29, the BPSK pin, controls the
selection of Phase Adjust Register 1 or Phase Adjust Register 2.
When low, Pin 29 selects Phase Adjust Register 1; when hig
selects Phase Adjust Register 2. Figure 48 illustrate
changes made to four cycles of an out
Basic BPSK Programming Steps
1.
Program a carrier frequency into Frequency Tuning Word 1.
Program the appropriate 14-bit phase words int
Adjust Register 1 and Phase Adjust Regi
3.
Attach the BPSK data source to Pin 29.
Note that for higher-order PSK modulation, the user can sele
the single-tone mode and program Phase Adjust Register
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