參數(shù)資料
型號: AD9725
廠商: Analog Devices, Inc.
英文描述: 14-Bit, 600+ MSPS D/A Converter
中文描述: 14位,600 MSPS的D / A轉(zhuǎn)換
文件頁數(shù): 7/16頁
文件大小: 267K
代理商: AD9725
Preliminary Technical Data
AD9725
PIN CONFIGURATION AND FUNCTION DESCRIPTION
Rev. PrA | Page 7 of 16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
D
27
26
25
24
23
22
21
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
FSADJ
REFIO
RESET
CSB
SCLK/SYNC_UPD
SDIO
SDO/SYNC_ALRM
DGND
DVDD
NC
NC
DB2–
DB2+
DBGND
CLKVDD
REXT
CLKVDD
CLKGND
CLK+
CLK–
CLKGND
DGND
DVDD
DB13+
DB13–
DB12+
DB12–
DB11+
DB11–
DB10+
DB10–
DB9+
DB9–
DBVDD
DB1–
DB1+
DB0–
DB0+
NC
NC
AD9725
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
0
S
I
I
A
A
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
Figure 4. Pin Configuration
Table 4. Pin Function Description
Pin
No.
1
CLKVDD
2
REXT
Name
Description
Pin
No.
41
42
Name
Description
Clock Supply Voltage
Bias Resistor. Sets DATACLK_OUT drive
strength. Nominally 1 k
to DBGND
Clock Supply Voltage
Clock Supply Common
Clock Input–True
Clock Input–Complement
Clock Supply Common
Digital Common
Digital Supply Voltage
Digital Input Bit 13–True
Digital Input Bit 13–Complement
Digital Input Bit 12–True
Digital Input Bit 12–Complement
Digital Input Bit 11–True
DBGND
DB2+
Digital Data Supply Common
Digital Input Bit 2–True
3
4
5
6
7
8
9
10
11
12
13
14
CLKVDD
CLKGND
CLK+
CLK–
CLKGND
DGND
DVDD
DB13+
DB13–
DB12+
DB12–
DB11+
43
44
45
46
47
48
49
50
51
52
53
54
DB2–
DB1+
DB1–
DB0+
DB0–
NC
NC
NC
NC
DVDD
DGND
SDO/SYNC_ALRM
Digital Input Bit 2–Complement
Digital Input Bit 1–True
Digital Input Bit 1–Complement
Digital Input Bit 0–True
Digital Input Bit 0–Complement
No Connect
No Connect
No Connect
No Connect
Digital Supply Voltage
Digital Common
SPI_DIS = 1: Data/Clock
Synchronization Alarm
SPI Serial Data Input/Output
SPI_DIS = 1: Data/Clock
Synchronization Update Required
SPI Chip Select (Active Low)
Hardware Reset
Reference Output, 1.2 V Nominal
Full-Scale Current Adjust
15
16
DB11–
DB10+
Digital Input Bit 11–Complement
Digital Input Bit 10–True
55
56
SDIO
SCLK/SYNC_UPD
17
18
19
20
DB10–
DB9+
DB9–
DBVDD
Digital Input Bit 10–Complement
Digital Input Bit 9–True
Digital Input Bit 9–Complement
Digital Data Supply Voltage
57
58
59
60
CSB
RESET
REFIO
FSADJ
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