
Preliminary Technical Data
AD9725
SPECIFICATIONS
DC SPECIFICATIONS
Table 1. T
MIN
to T
MAX
, AVDD1, AVDD2, DBVDD = 3.3 V, ADVDD, ACVDD, CLKVDD, DVDD = 2.5 V, I
OUTFS
= 20 mA, unless
otherwise noted. Specifications subject to change without notice
Parameter
Resolution
DC Accuracy
Integral Nonlinearity
Differential Nonlinearity
Analog Output
Offset Error
Gain Error
Full Scale Output Current
Output Compliance Range
Output Resistance
Output Capacitance
Reference Output
Reference Voltage
Reference Output Current
Reference Input
Reference Input Compliance Range
Reference Input Resistance
Small Signal Bandwidth
Temperature Coefficients
Offset Drift
Gain Drift (With Internal Reference)
Reference Voltage Drift
Power Supply
1
AVDD1, AVDD2
Voltage Range
Analog Supply Current (I
AVDD1
+ I
AVDD2
)
ADVDD
Voltage Range
ACVDD
Voltage Range
Analog Supply Current ( I
ADVDD
+ I
ACVDD
)
CLKVDD
Voltage Range
Clock Supply Current (I
CLKVDD
)
DVDD
Voltage Range
Digital Supply Current (I
DVDD
)
DBVDD
Voltage Range
Digital Supply Current (I
DBVDD
)
Nominal Power Dissipation (P
DIS
)
2
Nominal Power Dissipation (P
DIS
)
3
Rev. PrA | Page 3 of 16
Min
14
–1
1.14
0.1
Typ
±1.5
±0.75
20
TBD
TBD
1.2
100
5
0.5
TBD
TBD
TBD
3.3
51
2.5
2.5
9
2.5
20
2.5
69
3.3
20
479
1000
Max
1
1.26
1.25
Unit
Bits
LSB
LSB
%FSR
%FSR
mA
V
kW
pF
V
nA
V
kW
MHz
ppm of FSR/oC
ppm of FSR/oC
ppm/oC
V
mA
V
mA
V
mA
V
mA
V
mA
V
mA
mW
mW
1
Supply currents measured under the following conditions: f
DAC
= 200 MSPS, f
OUT
= 11 MHz, nominal power supply voltages
2
Power dissipation measured under the following conditions: f
DAC
= 200 MSPS, f
OUT
= 11 MHz, nominal power supply voltages
3
Power dissipation measured under the following conditions: f
DAC
= 600 MSPS, f
OUT
= 111 MHz, nominal power supply voltages