- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373965 > AD9725 (Analog Devices, Inc.) 14-Bit, 600+ MSPS D/A Converter PDF資料下載
參數(shù)資料
| 型號： | AD9725 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 14-Bit, 600+ MSPS D/A Converter |
| 中文描述： | 14位，600 MSPS的D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 267K |
| 代理商： | AD9725 |
Preliminary Technical Data
AD9725
SDO
Rev. PrA | Page 15 of 16
Serial data out. Data is read from this pin for protocols that use
separate lines for transmitting and receiving data. In the case
where the AD9725 operates in a single bidirectional I/O mode,
this pin does not output data and is set to a high impedance
state.
MSB/LSB Transfers
The AD9725 serial port can support both MSB first and LSB
first data formats. This functionality is controlled by register
address 00h Bit 6. The default is MSB first. When this bit is set
to active high, the AD9725 serial port is in LSB first format.
That is, if the AD9725 is in LSB first mode, the instruction byte
must be written from least significant bit to most significant bit.
Multibyte data transfers in MSB format can be completed by
writing an instruction byte that includes the register address of
the most significant byte. In MSB first mode, the serial port
internal byte address generator decrements for each byte
required of the multibyte communication cycle. Multibyte data
transfers in LSB first format can be completed by writing an
instruction byte that includes the register address of the least
significant byte. In LSB first mode, the serial port internal byte
address generator increments for each byte required of the
multibyte communication cycle.
The AD9725 serial port controller address will increment from
1Fh to 00h for multibyte I/O operations if the MSB first mode is
active. The serial port controller address will decrement from
00h to 1Fh for multibyte I/O operations if the LSB first mode is
active.
0
CS
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
SDIO
SDO
R/W 16(n)15(n)
14
13
12
11
10
D7nD6n
D7nD6n
D20
D10
D00
D20
D10
D00
Figure 9. Serial Register Interface Timing MSB First
NOTES ON SERIAL PORT OPERATION
The AD9725 serial port configuration bits reside in Bit 6 and
Bit 7 of register address 00h. It is important to note that the
configuration changes immediately upon writing to the last bit
of the register. For multibyte transfers, writing to this register
may occur during the middle of communication cycle. Care
must be taken to compensate for this new configuration for the
remaining bytes of the current communication cycle.
0
CS
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
SDIO
SDO
10
11
12
13
14
15(n)16(n)R/W
D00
D10D20
D00
D10D20
D6n
D7n
D6n
Figure 10. Serial Register Interface Timing LSB First
0
CS
t
DS
t
SCLK
t
PWH
t
PWL
t
DS
t
DH
INSTRUCTION BIT 7
INSTRUCTION BIT 6
SCLK
SDIO
Figure 11. Timing Diagram for Register Write to AD9725
0
CS
t
DV
DATA BIT n
DATA BIT n– 1
SCLK
SDO
SDIO
Figure 12. Timing Diagram for Register READ to AD9725
The same considerations apply to setting the reset bit in register
address 00h. All other registers are set to their default values, but
the software reset doesn’t affect the bits in register address 00h.
It is recommended to use only single byte transfers when
changing serial port configurations or initiating a software
reset.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9725BSV | 14-Bit, 600+ MSPS D/A Converter |
| AD9731BR | 10-Bit, 170 MSPS D/A Converter |
| AD9731BRS | 10-Bit, 170 MSPS D/A Converter |
| AD9731-PCB | 10-Bit, 170 MSPS D/A Converter |
| AD9731 | 10-Bit, 170 MSPS D/A Converter(170MSPS,10位單片D/A轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9725BSV | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 600+ MSPS D/A Converter |
| AD9726 | 制造商:Analog Devices 功能描述:16-BIT, 600 MSPS TXDAC+? D/A CONVERTER - Bulk |
| AD9726BST | 制造商:Analog Devices 功能描述:16-BIT, 600+ MSPS D/A CONVERTER - Bulk |
| AD9726BSV | 制造商:Analog Devices 功能描述:DAC 1CH 16BIT 80TQFP EP - Bulk |
| AD9726BSVRL | 制造商:Analog Devices 功能描述:DAC 1CH 16BIT 80TQFP EP - Tape and Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。