參數(shù)資料
型號: AD9522-4/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 64/84頁
文件大小: 0K
描述: BOARD EVAL FOR AD9522-4 CLK GEN
設計資源: AD9522 Eval Board Schematic
AD9522 BOM
標準包裝: 1
主要目的: 計時,時鐘發(fā)生器
嵌入式:
已用 IC / 零件: AD9522-4
主要屬性: 12 LVDS/24 CMOS 輸出,1.6 GHz VCO
次要屬性: I²C & SPI 接口
已供物品:
AD9522-4
Rev. 0 | Page 67 of 84
Table 52. PLL
Reg.
Addr
(Hex) Bit(s) Name
Description
010
[7]
PFD polarity
Sets the PFD polarity. Negative polarity is for use (if needed) with external VCO/VCXO only.
The on-chip VCO requires positive polarity, [7] = 0.
[7] = 0; positive (higher control voltage produces higher frequency) (default).
[7] = 1; negative (higher control voltage produces lower frequency).
010
[6:4]
CP current
Charge pump current (with CPRSET = 5.1 kΩ).
[6]
[5]
[4]
ICP (mA)
0
0.6
0
1
1.2
0
1
0
1.8
0
1
2.4
1
0
3.0
1
0
1
3.6
1
0
4.2
1
4.8 (default)
010
[3:2]
CP mode
Charge pump operating mode.
[3]
[2]
Charge Pump Mode
0
High impedance state.
0
1
Force source current (pump up).
1
0
Force sink current (pump down).
1
Normal operation (default).
010
[1:0]
PLL power-
down
PLL operating mode.
[1]
[0]
Mode
0
Normal operation; this mode must be selected to use the PLL.
0
1
Asynchronous power-down (default).
1
0
Unused.
1
Synchronous power-down.
011
[7:0]
14-bit R counter,
Bits[7:0] (LSB)
Reference divider LSBs—lower eight bits. The reference divider (also called the R divider or R counter) is
14 bits long. The lower eight bits are in this register (default: 0x01).
012
[5:0]
14-bit R counter,
Bits[13:8] (MSB)
Reference divider MSBs—upper six bits. The reference divider (also called the R divider or R counter) is
14 bits long. The upper six bits are in this register (default: 0x00).
013
[5:0]
6-bit A counter
A counter (part of N divider). The N divider is also called the feedback divider (default: 0x00).
014
[7:0]
13-bit B counter,
Bits[7:0] (LSB)
B counter (part of N divider)—lower eight bits. The N divider is also called the feedback divider (default: 0x03).
015
[4:0]
13-bit B counter,
Bits[12:8] (MSB)
B counter (part of N divider)—upper five bits. The N divider is also called the feedback divider (default: 0x00).
016
[7]
Set CP pin
to VCP/2
Sets the CP pin to one-half of the VCP supply voltage.
[7] = 0; CP normal operation (default).
[7] = 1; CP pin set to VCP/2.
016
[6]
Reset R counter
Reset R counter (R divider).
[6] = 0; normal (default).
[6] = 1; hold R counter in reset.
016
[5]
Reset A and B
counters
Reset A and B counters (part of N divider).
[5] = 0; normal (default).
[5] = 1; hold A and B counters in reset.
016
[4]
Reset all
counters
Reset R, A, and B counters.
[4] = 0; normal (default).
[4] = 1; hold R, A, and B counters in reset.
相關PDF資料
PDF描述
AD9520-0/PCBZ BOARD EVAL AD9520-0
SRR4018-270Y INDUCTOR POWER 27UH 0.77A 4018
MLF2012E8R2K INDUCTOR MULTILAYER 8.2UH 0805
V110B48E150BL CONVERTER MOD DC/DC 48V 150W
AD9515/PCBZ BOARD EVAL CLOCK 2CH AD9515
相關代理商/技術參數(shù)
參數(shù)描述
AD9522-5 制造商:AD 制造商全稱:Analog Devices 功能描述:12 LVDS/24 CMOS Output Clock Generator
AD9522-5/PCBZ 功能描述:BOARD EVALUATION FOR AD9522-5 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:PSoC® 主要目的:電源管理,熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板,CD,電源
AD9522-5BCPZ 功能描述:IC CLOCK GEN 2.4GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)
AD9522-5BCPZ-REEL7 功能描述:IC CLOCK GEN 2.4GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)
AD9523 制造商:AD 制造商全稱:Analog Devices 功能描述:Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs