參數(shù)資料
型號(hào): AD9272BSVZRL-65
廠商: Analog Devices Inc
文件頁數(shù): 23/44頁
文件大小: 0K
描述: IC ADC ASD OCTAL 65MSPS 100-TQFP
設(shè)計(jì)資源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
標(biāo)準(zhǔn)包裝: 1,000
類型: AAF,ADC,交叉點(diǎn)開關(guān),LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 1.8V,3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 帶卷 (TR)
配用: AD9272-65EBZ-ND - BOARD EVAL AD9272
AD9272
Rev. C | Page 3 of 44
The AD9272 requires a LVPECL-/CMOS-/LVDS-compatible
sample rate clock for full performance operation. No external
reference or driver components are required for many
applications.
The ADC automatically multiplies the sample rate clock for
the appropriate LVDS serial data rate. A data clock (DCO±) for
capturing data on the output and a frame clock (FCO±) trigger
for signaling a new output byte are provided.
Powering down individual channels is supported to increase
battery life for portable applications. There is also a standby
mode option that allows quick power-up for power cycling. In
CW Doppler operation, the VGA, antialiasing filter (AAF), and
ADC are powered down. The power of the time gain control
(TGC) path scales with selectable speed grades.
The ADC contains several features designed to maximize flexibility
and minimize system cost, such as a programmable clock, data
alignment, and programmable digital test pattern generation. The
digital test patterns include built-in fixed patterns, built-in
pseudorandom patterns, and custom user-defined test patterns
entered via the serial port interface.
Fabricated in an advanced CMOS process, the AD9272 is
available in a 16 mm × 16 mm, RoHS-compliant, 100-lead
TQFP. It is specified over the industrial temperature range of
40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
Small Footprint. Eight channels are contained in a
small, space-saving package. A full TGC path, ADC, and
crosspoint switch are contained within a 100-lead, 16 mm ×
16 mm TQFP.
2.
Low Power of 195 mW Per Channel at 40 MSPS.
3.
Integrated Crosspoint Switch. This switch allows numerous
multichannel configuration options to enable the CW
Doppler mode.
4.
Ease of Use. A data clock output (DCO±) operates up to
480 MHz and supports double data rate (DDR) operation.
5.
User Flexibility. Serial port interface (SPI) control offers a wide
range of flexible features to meet specific system requirements.
6.
Integrated Second-Order Antialiasing Filter. This filter is
placed between the VGA and the ADC and is programmable
from 8 MHz to 18 MHz.
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