參數(shù)資料
型號: AD9146BCPZRL
廠商: Analog Devices Inc
文件頁數(shù): 2/56頁
文件大?。?/td> 0K
描述: IC DAC 16BIT SRL DUAL 48LFCSP
標準包裝: 2,500
系列: TxDAC+®
設(shè)置時間: 20ns
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-WQ(7x7)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 1.23G
AD9146
Data Sheet
Rev. A | Page 10 of 56
Pin No.
Mnemonic
Description
28
D0N
Data Bit 0 (LSB), Negative.
29
DVDD18
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
30
TXENABLE
Active High Transmit Path Enable (CMOS). A low level on this pin clamps the DAC outputs to midscale.
31
SDIO
Serial Port Data Input/Output (CMOS).
32
SCLK
Serial Port Clock Input (CMOS).
33
CS
Serial Port Chip Select, Active Low (CMOS).
34
IRQ
Interrupt Request. Open-drain, active low output. Pull this pin high external to the device.
35
DVDD18
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
36
RESET
Reset, Active Low (CMOS).
37
AVDD33
3.3 V Analog Supply.
38
IOUT2P
Q DAC Positive Current Output.
39
IOUT2N
Q DAC Negative Current Output.
40
AVDD33
3.3 V Analog Supply.
41
AVSS
Analog Supply Common.
42
REFIO
1.2 V Band Gap Voltage Reference Output. Should be decoupled to AVSS with a 0.1 F capacitor.
43
FSADJ
Full-Scale Current Output Adjust. Place a 10 kΩ resistor from this pin to AVSS.
44
AVSS
Analog Supply Common.
45
AVDD33
3.3 V Analog Supply.
46
IOUT1N
I DAC Negative Current Output.
47
IOUT1P
I DAC Positive Current Output.
48
AVDD33
3.3 V Analog Supply.
EPAD
The exposed pad (EPAD) must be soldered to the ground plane (AVSS). The EPAD provides an electrical,
thermal, and mechanical connection to the board.
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