參數(shù)資料
型號: AD8175ABPZ
廠商: Analog Devices Inc
文件頁數(shù): 30/40頁
文件大?。?/td> 0K
描述: IC CROSSPOINT SWITCH TRPL 676BGA
標(biāo)準(zhǔn)包裝: 1
功能: 交叉點(diǎn)開關(guān)
電路: 3 x 16:9
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 4.5 V ~ 5.5 V,±2.5V
電流 - 電源: 600mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 676-BGA
供應(yīng)商設(shè)備封裝: 676-BGA(27x27)
包裝: 管件
AD8175
Data Sheet
Rev. B | Page 36 of 40
driven from a 75 Ω terminated cable, the input crosstalk can
be reduced by buffering this signal with a low output imped-
ance buffer.
On the output side, the crosstalk can be reduced by driving a
lighter load. Although the AD8175 is specified with excellent
settling time when driving a properly terminated CAT5, the
crosstalk is higher than the minimum obtainable due to the
high output currents. These currents induce crosstalk via the
mutual inductance of the output pins and bond wires of the
AD8175.
From a circuit standpoint, this output crosstalk mechanism
looks like a transformer with a mutual inductance between the
windings that drives a load resistor. For low frequencies, the
magnitude of the crosstalk is given by
×
=
L
XY
R
s
M
XT
10
log
20
(10)
where:
MXY is the mutual inductance of Output X to Output Y.
RL is the load resistance on the measured output.
This crosstalk mechanism can be minimized by keeping the
mutual inductance low and increasing RL. The mutual
inductance can be kept low by increasing the spacing of the
conductors and minimizing their parallel length.
PCB Layout
Extreme care must be exercised to minimize additional
crosstalk generated by the system circuit board(s). The areas
that must be carefully detailed are grounding, shielding, signal
routing, and supply bypassing.
The packaging of the AD8175 is designed to help keep the
crosstalk to a minimum. On the BGA substrate, each pair is
carefully routed to predominately couple to each other, with
shielding traces separating adjacent signal pairs. The ball grid
array is arranged such that similar board routing can be achieved.
Input and output differential pairs are grouped by channel
rather than by color to allow for easy, convenient board routing.
The input and output signals have minimum crosstalk if they
are located between ground planes on layers above and below,
and separated by ground in between. Vias should be located as
close to the IC as possible to carry the inputs and outputs to the
inner layer. The input and output signals surface at the input
termination resistors and the output series back-termination
resistors. To the extent possible, these signals should also be
separated as soon as they emerge from the IC package.
PCB Termination Layout
As frequencies of operation increase, the importance of proper
transmission line signal routing becomes more important. The
bandwidth of the AD8175 is large enough that using high
impedance routing does not provide a flat in-band frequency
response for practical signal trace lengths. It is necessary for the
user to choose a characteristic impedance suitable for the applica-
tion and properly terminate the input and output signals of the
AD8175. Traditionally, video applications have used 75 Ω
single-ended environments. RF applications are generally 50 Ω
single-ended (and board manufacturers have the most experience
with this application). CAT-5 cabling is usually driven as
differential pairs of 100 Ω differential impedance.
For flexibility, the AD8175 does not contain on-chip termina-
tion resistors. This flexibility in application comes with some
board layout challenges. The distance between the termination
of the input transmission line and the AD8175 die is a high
impedance stub, and causes reflections of the input signal. With
some simplification, it can be shown that these reflections cause
peaking of the input at regular intervals in frequency, dependent
on the propagation speed (VP) of the signal in the chosen board
material and the distance (d) between the termination resistor
and the AD8175. If the distance is great enough, these peaks
can occur in-band. In fact, practical experience shows that these
peaks are not high-Q, and should be pushed out to three or four
times the desired bandwidth in order to not have an effect on
the signal. For a board designer using FR4 (VP = 144 × 106 m/s),
this means the AD8175 should be no more than 1.5 cm after the
termination resistors, and preferably should be placed even
closer. The BGA substrate routing inside the AD8175 is approxi-
mately 1 cm in length and adds to the stub length, so 1.5 cm
PCB routing equates to d = 2.5 × 10–2 m in the calculations.
(
)
d
V
n
f
P
PEAK
4
1
2 +
=
(11)
where n = {0, 1, 2, 3, ...}.
In some cases, it is difficult to place the termination close to the
AD8175 due to space constraints, differential routing, and large
resistor footprints. A preferable solution in this case is to main-
tain a controlled transmission line past the AD8175 inputs and
terminate the end of the line. This is known as fly-by termination.
The input impedance of the AD8175 is large enough and stub
length inside the package is small enough that this works well in
practice. Implementation of fly-by input termination often
includes bringing the signal in on one routing layer, then
passing through a filled via under the AD8175 input ball, then
back out to termination on another signal layer. In this case,
care must be taken to tie the reference ground planes together
near the signal via if the signal layers are referenced to different
ground planes.
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