參數(shù)資料
型號: AD8175ABPZ
廠商: Analog Devices Inc
文件頁數(shù): 24/40頁
文件大?。?/td> 0K
描述: IC CROSSPOINT SWITCH TRPL 676BGA
標準包裝: 1
功能: 交叉點開關
電路: 3 x 16:9
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 4.5 V ~ 5.5 V,±2.5V
電流 - 電源: 600mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 676-BGA
供應商設備封裝: 676-BGA(27x27)
包裝: 管件
AD8175
Data Sheet
Rev. B | Page 30 of 40
difference is that the SER/PAR pin is held low, as if serial
programming were taking place. By holding CLK high, no serial
clocking will occur, and instead, the WE can be used to clock all
first rank latches in the chip at once.
DIFFERENTIAL AND SINGLE-ENDED OPERATION
Although the AD8175 has fully differential inputs and outputs,
it can also be operated in a single-ended fashion. Single-ended
and differential configurations are discussed below, along with
implications on gain, impedances, and terminations.
Differential Input
Each differential input to the AD8175 is applied to a differential
receiver. These receivers allow the user to drive the inputs with
an uncertain common-mode voltage, such as from a remote
source over twisted pair. The receivers respond only to the
differences in input voltages and restore an internal common-
mode suitable for the internal signal path. Noise or crosstalk,
which affect each receiver’s inputs equally, are rejected by the
input stage, as specified by its common-mode rejection ratio
(CMRR).
Furthermore, the overall common-mode voltage of all three
differential pairs comprising an RGB channel is processed and
rejected by a separate circuit block. For example, a static
discharge or a resistive voltage drop in a middle-of-CAT5-run
with sync-on CM signaling coupling into all three pairs in an
RGB channel are rejected at the output of the AD8175, while
the sync-on CM signals are allowed through the switch.
The circuit configuration used by the differential input receivers
is similar to that of several Analog Devices general-purpose
differential amplifiers, such as the AD8131. The topology is that
of a voltage-feedback amplifier with internal gain resistors. The
input differential impedance for each receiver is 5 kΩ in parallel
with 10 kΩ or 3.33 kΩ, as shown in Figure 50.
IN+
IN–
RG
RCM
RCVR
RF
OUT–
OUT+
TO SWITCH MATRIX
06478-
023
Figure 50. Input Receiver Equivalent Circuit
This impedance creates a small differential termination error if
the user does not account for the 3.33 kΩ parallel element.
However, this error is less than 1% in most cases. Additionally,
the source impedance driving the AD8175 appears in parallel
with the internal gain-setting resistors, such that there may be a
gain error for some values of source resistance. The AD8175 is
adjusted such that its gain is correct when driven by a back-
terminated CAT5 cable (25 Ω effective impedance to ground at
each input pin, or 100 Ω differential source impedance across
pairs of input pins). If a different source impedance is presented,
the differential gain of the AD8175 can be calculated as
S
dm
R
G
+
=
5
.
2
525
.
2
where RS is the effective impedance to ground at each input pin.
When operating with a differential input, care must be taken to
keep the common-mode, or average, of the input voltages
within the linear operating range of the AD8175 receiver. For
the AD8175 receiver, this common-mode range can extend rail-
to-rail, provided the differential signal swing is small enough to
avoid forward biasing the ESD diodes (it is safest to keep the
common-mode plus differential signal excursions within the
supply voltages of the part).
The input voltage of the AD8175 is linear for ±1 V of differential
input voltage difference (this limitation is primarily due to
ability of the output to swing close to the rails, since the differ-
ential gain through the part is +2). Beyond this level, the signal
path will saturate and limit the signal swing. This is not a
desired operation, as the supply current will increase and the
signal path will be slow to recover from clipping. The absolute
maximum allowed differential input signal is limited by long-
term reliability of the input stage. The limits in the Absolute
Maximum Ratings section of the data sheet should be observed
in order to avoid degrading device performance permanently.
AC Coupling of Inputs
It is possible to ac-couple the inputs of the AD8175 receiver, so
that bias current does not need to be supplied externally. A
capacitor in series with the inputs to the AD8175 creates a high-
pass filter with the input impedance of the device. This capacitor
needs to be sized large enough so that the corner frequency
includes all frequencies of interest.
Single-Ended Input
The AD8175 input receiver can be driven single-endedly
(unbalanced). Single-ended inputs apply a component of
common-mode signal to the receiver inputs, which is then
rejected by the receiver (see the Specifications section for
common-mode-to-differential-mode ratio of the part).
The single-ended input resistance RIN differs from the
differential input impedance, and is equal to
)
(
2
1
F
G
F
G
IN
R
+
×
=
with RG and RF as shown in Figure 50.
Note that this value is smaller than the differential input
resistance, but it is larger than RG. The difference is due to the
component of common-mode level applied to the receiver by
single-ended inputs. A second, smaller component of input
resistance (RCM, also shown in Figure 50) is present across the
inputs in both single-ended and differential operation.
In single-ended operation, an input is driven, while the
undriven input is often tied to midsupply or ground. Since
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