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參數(shù)資料
| 型號： | AD8175ABPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CROSSPOINT SWITCH TRPL 676BGA |
| 標準包裝： | 1 |
| 功能： | 交叉點開關(guān) |
| 電路： | 3 x 16:9 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 5.5 V，±2.5V |
| 電流 - 電源： | 600mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 676-BGA |
| 供應(yīng)商設(shè)備封裝： | 676-BGA（27x27） |
| 包裝： | 管件 |
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AD8175
Data Sheet
Rev. B | Page 26 of 40
THEORY OF OPERATION
The AD8175 is a non-blocking crosspoint with 16 differential
RGB input channels and nine differential RGB output channels.
Although the AD8175 is primarily meant for differential-in,
differential-out middle-of-CAT5-run applications, each
differential RGB output channel is complemented by H and V
syncs for use in end-of-CAT5-run, single-ended output
applications.
Processing of common-mode (CM) voltage levels is achieved by
placing the AD8175 in either of its two operation modes. In the
first operation mode (CMENC low), the input CM of each RGB
differential pair (possibly present either in the form of sync-on
CM signaling or noise) is removed through the switch, and the
output CM is set to a global reference voltage via the VOCM_
CMENCOFF analog input. Therefore, the AD8175 can behave
as a differential-in, differential-out switch. If sync-on CM
signaling is present at the differential RGB inputs, then the H
and V outputs represent decoded syncs. In the second operation
mode, input sync-on CM signaling is propagated through the
switch. Note that in this mode, as in the previous one, the
overall input CM is blocked through the switch. In this mode,
the overall output CM is set to a global reference voltage via the
VOCM_CMENCON analog input.
In either operation mode, input pin VBLK defines the black
level of the positive output phase. The combination of VBLK
and VOCM_CMENCOFF allows the user to position the
positive and negative output phases anywhere in the allowable
output voltage range.
The switch is organized into nine 16:1 RBG multiplexers, with
each being responsible for connecting an RGB input channel to
its respective RGB output channel. Decoding logic selects a
single input (or none) in each multiplexer and connects it to its
respective output. Feedback around each multiplexer realizes a
closed-loop differential-in, differential-out gain of +2. A second
loop realizes a closed-loop common-mode-in gain of +1.
Each differential RGB input channel is buffered by a differential
receiver, which is capable of accepting input CM voltages
extending all the way to either supply rail. In addition to passing
differential information, each receiver processes and routes
input CM voltages. Excess closed-loop receiver bandwidth
reduces the receiver’s effect on the overall device bandwidth.
The output stage is designed for fast slew rate and settling time
while driving a series-terminated CAT5 cable. Unlike
competing multiplexer designs, the small signal bandwidth
closely approaches the large signal bandwidth.
The outputs of the AD8175 can be disabled to minimize on-
chip power dissipation. When disabled, there is a feedback
network of approximately 2.7 kΩ between the differential
outputs. This high impedance allows multiple ICs to be bussed
together without additional buffering. Care must be taken to
reduce output capacitance, which can result in overshoot and
frequency-domain peaking. A series of internal amplifiers drive
internal nodes such that wideband high impedance is presented
at the disabled output, even while the output bus experiences
fast signal swings. When the outputs are disabled and driven
externally, the voltage applied to them should not exceed the
valid output swing range for the AD8175 in order to keep these
internal amplifiers in their linear range of operation. Applying
excessive differential voltages to the disabled outputs can cause
damage to the AD8175 and should be avoided (see the Absolute
Maximum Ratings section of this data sheet for guidelines).
The connectivity of the AD8175 is controlled by a flexible TTL-
compatible logic interface. Either parallel or serial loading into a
first rank of latches preprograms each output. A global update
signal moves the programming data into the second rank of
latches, simultaneously updating all outputs. In serial mode, a
serial-out pin allows devices to be daisy-chained together for a
single-pin programming of multiple ICs. A power-on reset pin
is available to avoid bus conflicts by disabling all outputs. This
power-on reset clears the second rank of latches, but does not
clear the first rank of latches. A broadcast parallel programming
feature is available in parallel mode to quickly clear the first
rank. In serial mode, preprogramming individual inputs is not
possible and the entire shift register needs to be flushed. A
global chip-select pin gates the input clock and the global
update signal to the second rank of buffers.
The AD8175 can operate on a single +5 V supply, powering
both the signal path (with the VPOS/VNEG supply pins) and
the control logic interface (with the VDD/DGND supply pins).
Split supply operation is possible with ±2.5 V supplies in order
to easily interface to ground-referenced video signals. In this
case, a flexible logic interface allows the control logic supplies
(VDD/DGND) to be run off +5 V/0 V to +3.3 V/0 V while the
analog core remains on split supplies. Additional flexibility in
the analog output common-mode level (VOCM_CMENCOFF)
and output black level (VBLK) facilitates operation with
unequally split supplies. If +3 V/2 V supplies to +2 V/3 V
supplies are desired, the output CM can still be set to 0 V for
ground-referenced video signals.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8175-EVALZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Video Crosspoint Switch |
| AD8176 | 制造商:AD 制造商全稱:Analog Devices 功能描述:475 MHz, Triple 16 】 9 Video Crosspoint Switch |
| AD8176ABPZ | 功能描述:IC VIDEO CROSSPOINT SWIT 676BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標準包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8176-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:475 MHz, Triple 16 】 9 Video Crosspoint Switch |
| AD8177 | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 MHz, Triple 16 】 5 Video Crosspoint Switch |
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