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參數(shù)資料
| 型號： | AD8117 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Video Crosspoint Switch Video Crosspoint Switch |
| 中文描述： | 視頻交叉點(diǎn)開關(guān)視頻交叉點(diǎn)開關(guān) |
| 文件頁數(shù)： | 24/32頁 |
| 文件大?。?/td> | 488K |
| 代理商： | AD8117 |
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AD8117/AD8118
Preliminary Technical Data
A third benefit of driving balanced loads can be seen if one
considers that the output pulse response will change as load
changes. The differential signal control loop in the
AD8117/AD8118 forces the difference of the outputs to be a
fixed ratio to the difference of the inputs. If the two output
responses are different due to loading, this creates a difference
that the control loop will see as signal response error, and it will
attempt to correct this error. This will distort the output signal
from the ideal response if the two outputs were balanced.
Rev. PrA | Page 24 of 32
75
150
75
OPn
AD8117
ONn
Figure 26. Example of Back-Terminated Single-Ended Load
Decoupling
The signal path of the AD8117/AD8118 is based on high open
loop gain amplifiers with negative feedback. Dominant-pole
compensation is used on-chip to stabilize these amplifiers over
the range of expected applied swing and load conditions. To
guarantee this designed stability, proper supply decoupling is
necessary with respect to both the differential control loops and
the common-mode control loops of the signal path. Signal-
generated currents must return to their sources through low-
impedance paths at all frequencies in which there is still loop
gain (up to 700 MHz at a minimum). Refer to the example
Evaluation Board schematic as an example of wideband parallel
capacitor arrangements that can properly decouple the
AD8117/AD8118.
The signal path compensation capacitors in the
AD8117/AD8118 are connected to the VNEG supply. At high
frequencies, this limits the power supply rejection ratio (PSRR)
from the VNEG supply to a lower value than that from the
VPOS supply. If given a choice, an application board should be
designed such that the VNEG power is supplied from a low-
inductance plane, subject to a least amount of noise.
The VOCM should be considered a reference pin and not a
power supply. It is an input to the high-speed, high-gain
common-mode control loop of all receivers and output drivers.
In the single-ended output sense, there is no rejection from
noise on the VOCM net to the output. For this reason, care
must be taken to produce a low-noise VOCM source over the
entire range of frequencies of interest. This is not only
important to single-ended operation, but to differential
operation as there is a common-mode to differential gain
conversion that becomes greater at higher frequencies.
During operation of the AD8117/AD8118, transient currents
will flow into the VOCM net from the amplifier control loops.
Although the magnitude of these currents are small (10 – 20 μA
per output), they can contribute to crosstalk if they flow
through significant impedances. Driving VOCM with a low-
impedance, low-noise source is desirable.
Power Dissipation
Calculation of Power Dissipation
8.0
M
7.0
4.0
6.0
5.0
85
75
AMBIENT TEMPERATURE – C
T
J
= 150 C
65
55
45
35
25
15
Figure 27. Maximum Die Power Dissipation vs. Ambient Temperature
The above curve was calculated from
As an example, if the AD8117/AD8118 is enclosed in an
environment at 45
°
C (T
A
), the total on-chip dissipation under
all load and supply conditions must not be allowed to exceed
7.0 W.
When calculating on-chip power dissipation, it is necessary to
include the rms current being delivered to the load, multiplied
by the rms voltage drop on the AD8117/AD8118 output
devices. For a sinusoidal output, the on-chip power dissipation
due the load can be approximated by
For nonsinusoidal output, the power dissipation should be
calculated by integrating the on-chip voltage drop multiplied by
the load current over one period.
The user may subtract the quiescent current for the Class AB
output stage when calculating the loaded power dissipation. For
P
D, OUT
= (
V
POS
–
V
OUTPUT, RMS
) ×
I
OUTPUT, RMS
P
D, MAX
=
(
T
JUNCTION, MAX
–
T
AMBIENT
)
θ
JA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8117_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
| AD8117ABPZ | 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8117-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
| AD8118 | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
| AD8118ABPZ | 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
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