參數(shù)資料
型號(hào)： AD8117
廠商： Analog Devices, Inc.
英文描述： Video Crosspoint Switch Video Crosspoint Switch
中文描述： 視頻交叉點(diǎn)開關(guān)視頻交叉點(diǎn)開關(guān)
文件頁(yè)數(shù)： 19/32頁(yè)
文件大?。?/td> 488K
代理商： AD8117
Preliminary Technical Data
AD8117/AD8118
APPLICATIONS
Rev. PrA | Page 19 of 32
PROGRAMMING
The AD8117/AD8118 have two options for changing the
programming of the crosspoint matrix. In the first option a
serial word of 192 bits can be provided that will update the
entire matrix each time. The second option allows for changing
a single output’s programming via a parallel interface. The
serial option requires fewer signals, but more time (clock
cycles) for changing the programming, while the parallel
programming technique requires more signals, but can change
a single output at a time and requires fewer clock cycles to
complete programming.
Serial Programming Description
The serial programming mode uses the device pins CLK,
DATA IN, UPDATE and SER/PAR. The first step is to assert a
LOW on SER/PAR in order to enable the serial programming
mode. The parallel clock, WE should be held HIGH during the
entire serial programming operation.
The UPDATE
signal should be high during the time that data is
shifted into the device’s serial port. Although the data will still
shift in when UPDATE
is LOW, the transparent, asynchronous
latches will allow the shifting data to reach the matrix. This will
cause the matrix to try to update to every intermediate state as
defined by the shifting data.
The data at DATA IN is clocked in at every falling edge of CLK.
A total of 192 bits must be shifted in to complete the
programming. For each of the 32 outputs, there are five bits
(D0–D4) that determine the source of its input followed by one
bit (D5) that determines the enabled state of the output. If D5 is
LOW (output disabled), the four associated bits (D0–D4) do
not matter, because no input will be switched to that output.
The most-significant-output-address data is shifted in first,
then following in sequence until the least-significant-output-
address data is shifted in. At this point UPDATE
can be taken
low, which will cause the programming of the device according
to the data that was just shifted in. The UPDATE
latches are
asynchronous and when UPDATE
is low they are transparent.
If more than one AD8117 device is to be serially programmed
in a system, the DATA OUT signal from one device can be
connected to the DATA IN of the next device to form a serial
chain. All of the CLK, UPDATE, and SER/PAR pins should be
connected in parallel and operated as described above. The
serial data is input to the DATA IN pin of the first device of the
chain, and it will ripple through to the last. Therefore, the data
for the last device in the chain should come at the beginning of
the programming sequence. The length of the programming
sequence will be 192 bits times the number of devices in the
chain.
Parallel Programming Description
When using the parallel programming mode, it is not necessary
to reprogram the entire device when making changes to the
matrix. In fact, parallel programming allows the modification
of a single output at a time. Since this takes only one
WE/UPDATE cycle, significant time savings can be realized by
using parallel programming.
One important consideration in using parallel programming is
that the RESET
signal does not reset all registers in the
AD8117. When taken LOW, the RESET
signal will only set
each output to the disabled state. This is helpful during power-
up to ensure that two parallel outputs will not be active at the
same time.
After initial power-up, the internal registers in the device will
generally have random data, even though the RESET
signal has
been asserted. If parallel programming is used to program one
output, then that output will be properly programmed, but the
rest of the device will have a random program state depending
on the internal register content at power-up. Therefore, when
using parallel programming, it is essential that all outputs be
programmed to a desired state after power-up. This will ensure
that the programming matrix is always in a known state. From
then on, parallel programming can be used to modify a single
output or more at a time.
In similar fashion, if UPDATE is taken LOW after initial
power-up, the random power-up data in the shift register will
be programmed into the matrix. Therefore, in order to prevent
the crosspoint from being programmed into an unknown state,
do not apply a low logic level to UPDATE after power is
initially applied. Programming the full shift register one time to
a desired state, by either serial or parallel programming after
initial power-up, will eliminate the possibility of programming
the matrix to an unknown state.
To change an output’s programming via parallel programming,
SER/PAR and UPDATE
should be taken HIGH. The serial
programming clock, CLK, should be left HIGH during parallel
programming. The parallel clock, WE, should start in the
HIGH state. The 5-bit address of the output to be programmed
should be put on A0–A4. The first five data bits (D0–D4)
should contain the information that identifies the input that
gets programmed to the output that is addressed. The sixth data
bit (D5) will determine the enabled state of the output. If D5 is
LOW (output disabled), then the data on D0–D4 does not
matter.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD8117_07 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch
AD8117ABPZ 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR)
AD8117-EVAL 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch
AD8118 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch
AD8118ABPZ 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR)
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