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參數(shù)資料
| 型號： | AD8117 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Video Crosspoint Switch Video Crosspoint Switch |
| 中文描述： | 視頻交叉點(diǎn)開關(guān)視頻交叉點(diǎn)開關(guān) |
| 文件頁數(shù)： | 22/32頁 |
| 文件大?。?/td> | 488K |
| 代理商： | AD8117 |
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AD8117/AD8118
Preliminary Technical Data
Rev. PrA | Page 22 of 32
75
75
(
or 37.5
)
OPn
AD8117
ONn
RCVR
IPn
INn
Figure 24. Example of Input Driven Single-Ended
Differential Output
Benefits of Differential Operation
The AD8117/AD8118 has a fully-differential switch core, with
differential outputs. The two output voltages move in opposite
directions, with a differential feedback loop maintaining a fixed
output stage differential gain of +1 (the different overall signal
path gains between the AD8117 and AD8118 are set in the
input stage for best signal-to-noise ratio). This differential
output stage provides a benefit of crosstalk-canceling due to
parasitic coupling from one output to another being equal and
out of phase. Additionally, if the output of the device is utilized
in a differential design, noise, crosstalk and offset voltages
generated on-chip that are coupled equally into both outputs
will be cancelled by the common-mode rejection ratio of the
next device in the signal chain. By utilizing the
AD8117/AD8118 outputs in a differential application, the best
possible noise and offset specifications can be realized.
Differential Gain
The specified signal path gain of the AD8117/AD8118 refers to
its differential gain. For the AD8117, the gain of +1 means that
the difference in voltage between the two output terminals is
equal to the difference applied between the two input terminals.
For the AD8118, the ratio of output difference voltage to
applied input difference voltage is +2.
The common-mode, or average voltage of the pair of output
signals is set by the voltage on the VOCM pin. This voltage is
typically set to mid-supply (often ground), but may be moved
approximately ± 0.5 V in order to accommodate cases where
the desired output common-mode voltage may not be mid-
supply (as in the case of unequal split supplies). Adjusting
VOCM beyond ± 0.5 V can limit differential swing internally
below the specifications on the datasheet.
Regardless of the differential gain of the device, the common-
mode gain for the AD8117 and AD8118 is +1 to the output.
This means that the common-mode of the output voltages will
directly follow the reference voltage applied to the VOCM
input.
The VOCM reference is a high-speed signal input, common to
all output stages on the device. It requires only small amounts
of bias current, but noise appearing on this pin will be buffered
to the outputs of all the output stages. As such, the VOCM
node should be connected to a low-noise, low-impedance
voltage to avoid being a source of noise, offset and crosstalk in
the signal path.
Termination
The AD8117/AD8118 is designed to drive 150 Ω on each
output (or an effective 300 Ω differential) while meeting
datasheet specifications, but the output stage is capable of
supplying the current to drive 100 Ω loads (200 Ω differential)
over the specified operating temperature range. If care is taken
to observe the maximum power derating curves, the output
stage can drive 75 Ω loads with slightly reduced slew rate and
bandwidth (an effective 150 Ω differential load).
Termination at the load end is recommended for best signal
integrity. This load termination is often a resistor to a ground
reference on each individual output. By terminating to the
same voltage level that drives the VOCM reference, the power
dissipation due to DC termination current will be reduced. In
differential signal paths, it is often desirable to terminate
differentially, with a single resistor across the differential
outputs at the load end. This is acceptable for the
AD8117/AD8118, but when the device outputs are placed in a
disabled state, a small amount of DC bias current is required if
the output is to present as a high-impedance over an excursion
of output bus voltages. If the AD8117/AD8118 disabled outputs
are floated (or simply tied together by a resistor), internal nodes
will saturate and an increase in disabled output current may be
observed.
For best pulse response, it is often desirable to place a series
resistor in each output to match the characteristic impedance
and termination of the output trace or cable. This is known as
back-termination, and helps shorten settling time by
terminating reflected signals when driving a load that is not
accurately terminated at the load end. A side-effect of back-
termination is an attenuation of the output signal by a factor of
two. In this case, a gain of two is usually necessary somewhere
in the signal path to restore the signal.
50
50
100
OPn
AD8117
ONn
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| AD8123ACPZ-R7 | Triple Differential Receiver with Adjustable Line Equalization |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8117_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
| AD8117ABPZ | 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8117-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
| AD8118 | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
| AD8118ABPZ | 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
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