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參數(shù)資料
| 型號(hào)： | AD7453BRTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/21頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT W/DIFF INP SOT23-8 |
| 設(shè)計(jì)資源： | Measuring -48 V High-Side Current Using AD629, AD8603, AD780, and AD7453 (CN0100) |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 555k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 7.25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)偽差分，雙極 |
AD7453
Rev. B | Page 12 of 20
TYPICAL CONNECTION DIAGRAM
Figure 17 shows a typical connection diagram for the AD7453.
In this setup, the GND pin is connected to the analog ground
plane of the system. The VREF pin is connected to the AD780, a
2.5 V decoupled reference source. The signal source is connec-
ted to the VIN+ analog input via a unity gain buffer. A dc voltage
is connected to the VIN– pin to provide a pseudo ground for the
VIN+ input. The VDD pin should be decoupled to AGND with a
10 F tantalum capacitor in parallel with a 0.1 F ceramic
capacitor. The reference pin should be decoupled to AGND with
a capacitor of at least 0.1 F. The conversion result is output in a
16-bit word with four leading zeros followed by the MSB of the
12-bit result.
VIN+
VIN–
VDD
SCLK
SDATA
CS
GND
VREF
SERIAL
INTERFACE
+2.7V TO +5.25V
SUPPLY
2.5V
AD780
AD7453
VREF
P-TO-P
DC INPUT
VOLTAGE
C/P
03155-A-017
0.1
F
10
F
0.1
F
Figure 17. Typical Connection Diagram
THE ANALOG INPUT
The AD7453 has a pseudo differential analog input. The VIN+
input is coupled to the signal source and must have an ampli-
tude of VREF p-p to make use of the full dynamic range of the
part. A dc input is applied to VIN–. The voltage applied to this
input provides an offset from ground or a pseudo ground for
the VIN+ input. The main benefit of pseudo differential inputs
is that they separate the analog input signal ground from the
ADC’s ground, allowing dc common-mode voltages to be
cancelled.
Because the ADC operates from a single supply, it is necessary
to level shift ground-based bipolar signals to comply with the
input requirements. An op amp (for example, the AD8021) can
be configured to rescale and level shift a ground-based (bipolar)
signal so that it is compatible with the input range of the
AD7453. See Figure 18.
When a conversion takes place, the pseudo ground corresponds
to 0 and the maximum analog input corresponds to 4096.
EXTERNAL
VREF (2.5V)
R
VIN+
VIN–
AD7453
2.5V
1.25V
0V
VREF
+1.25V
0V
–1.25V
VIN
R
3R
0.1
F
R
03155-A
-018
Figure 18. Op Amp Configuration to Level Shift a Bipolar Input Signal
Analog Input Structure
Figure 19 shows the equivalent circuit of the analog input struc-
ture of the AD7453. The four diodes provide ESD protection for
the analog inputs. Care must be taken to ensure that the analog
input signals never exceed the supply rails by more than
300 mV. This causes these diodes to become forward biased and
to start conducting into the substrate. These diodes can conduct
up to 10 mA without causing irreversible damage to the part.
The capacitors, C1 in Figure 19, are typically 4 pF and can be
attributed primarily to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 .
The capacitors C2 are the ADC’s sampling capacitors, and have
a typical capacitance of 16 pF.
For ac applications, removing high frequency components from
the analog input signal through the use of an RC low-pass filter
on the relevant analog input pins is recommended. In applica-
tions where harmonic distortion and signal-to-noise ratio are
critical, the analog input should be driven from a low imped-
ance source. Large source impedances significantly affect the ac
performance of the ADC, which may necessitate the use of an
input buffer amplifier. The choice of the op amp is a function of
the particular application.
C1
C2
R1
D
C1
C2
R1
D
VDD
03155-A
-019
VIN+
VIN–
Figure 19. Equivalent Analog Input Circuit.
Conversion Phase—Switches Open; Track Phase—Switches Closed
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