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參數(shù)資料
| 型號(hào)： | AD7453BRTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 20/21頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT W/DIFF INP SOT23-8 |
| 設(shè)計(jì)資源： | Measuring -48 V High-Side Current Using AD629, AD8603, AD780, and AD7453 (CN0100) |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 555k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 7.25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類(lèi)型： | 1 個(gè)偽差分，雙極 |
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AD7453
Rev. B | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VDD 1
SCLK
2
SDATA
3
CS
4
VREF
VIN+
VIN–
GND
8
7
6
5
03155-A-004
AD7453
TOP VIEW
(Not to Scale)
Figure 4. Pin Function Descriptions
Table 4. Pin Function Descriptions
Mnemonic
Function
VREF
Reference Input for the AD7453. An external reference in the range 100 mV to VDD must be applied to this input. The specified
reference input is 2.5 V. This pin should be decoupled to GND with a capacitor of at least 0.1 F.
VIN+
Noninverting Analog Input.
VIN–
Inverting Input. This pin sets the ground reference point for the VIN+ input. Connect to ground or to a dc offset to provide a
pseudo ground.
GND
Analog Ground. Ground reference point for all circuitry on the AD7453. All analog input signals and any external reference
signal should be referred to this GND voltage.
CS
Chip Select. Active low logic input. This input provides the dual function of initiating a conversion on the AD7453 and
framing the serial data transfer.
SDATA
Serial Data. Logic output. The conversion result from the AD7453 is provided on this output as a serial data stream. The bits
are clocked out on the falling edge of the SCLK input. The data stream of the AD7453 consists of four leading zeros followed
by the 12 bits of conversion data that are provided MSB first. The output coding is straight (natural) binary.
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the
clock source for the conversion process.
VDD
Power Supply Input. VDD is 2.7 V to 5.25 V. This supply should be decoupled to GND with a 0.1 F capacitor and a 10 F
tantalum capacitor.
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| AD7457 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Low Power, Pseudo Differential, 100 kSPS 12-Bit ADC in an 8-Lead SOT-23 |
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| AD7457BRT-R2 | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Serial 8-Pin SOT-23 T/R 制造商:Rochester Electronics LLC 功能描述:12-BIT P/DIFF I/PUT, 100KSPS ADC I.C. - Bulk |
| AD7457BRT-REEL | 制造商:Analog Devices 功能描述:ADC SGL SAR 100KSPS 12-BIT SERL 8PIN SOT-23 - Tape and Reel |
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