參數(shù)資料
型號(hào)： AD7194BCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 49/57頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT SPI 4.8K 32-LFCSP
產(chǎn)品培訓(xùn)模塊： Weigh Scale Introduction
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 24
采樣率（每秒）： 4.8k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-WFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-WQ（5x5）
包裝： 管件
輸入數(shù)目和類(lèi)型： 8 個(gè)差分，單極；8 個(gè)差分，雙極；16 個(gè)偽差分，單極；16 偽差分，雙極
產(chǎn)品目錄頁(yè)面： 777 (CN2011-ZH PDF)
其它名稱(chēng)： AD7194BRUZ
AD7194BRUZ-ND
AD7194
Data Sheet
Rev. A | Page 52 of 56
GROUNDING AND LAYOUT
Because the analog inputs and reference inputs are differential,
most of the voltages in the analog modulator are common-
mode voltages. The high common-mode rejection of the part
removes common-mode noise on these inputs. The analog and
digital supplies to the AD7194 are independent and separately
pinned out to minimize coupling between the analog and
digital sections of the device. The digital filter provides rejection
of broadband noise on the power supplies, except at integer
multiples of the modulator sampling frequency.
Connect an R-C filter to each analog input pin to provide rejection
at the modulator sampling frequency. A 100 Ω resistor in series
with each analog input, a 0.1 μF capacitor between the analog
input pins, and a 0.01 μF capacitor from each analog input to
AGND are advised.
The digital filter also removes noise from the analog and
reference inputs provided that these noise sources do not
saturate the analog modulator. As a result, the AD7194 is
more immune to noise interference than a conventional high
resolution converter. However, because the resolution of the
AD7194 is so high and the noise levels from the converter so
low, care must be taken with regard to grounding and layout.
The printed circuit board (PCB) that houses the ADC must be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the
use of ground planes that can be easily separated. A minimum
etch technique is generally best for ground planes because it
gives the best shielding.
Although the AD7194 has separate pins for analog and digital
ground, the AGND and DGND pins are tied together internally
via the substrate. Therefore, the user must not tie these two pins
to separate ground planes unless the ground planes are connected
together near the AD7194.
In systems in which the AGND and DGND are connected
somewhere else in the system (that is, the power supply of the
system), they should not be connected again at the AD7194
because a ground loop results. In these situations, it is recom-
mended that the ground pins of the AD7194 be tied to the
AGND plane.
In any layout, the user must keep in mind the flow of currents
in the system, ensuring that the paths for all currents are as close as
possible to the paths the currents took to reach their destinations.
Avoid forcing digital currents to flow through the AGND.
Avoid running digital lines under the device because this
couples noise onto the die, and allows the analog ground plane
to run under the AD7194 to prevent noise coupling. The power
supply lines to the AD7194 must use as wide a trace as possible
to provide low impedance paths and reduce the effects of
glitches on the power supply line. Shield fast switching signals,
like clocks, with digital ground to prevent radiating noise to
other sections of the board, and never run clock signals near the
analog inputs. Avoid crossover of digital and analog signals.
Run traces on opposite sides of the board at right angles to each
other. This reduces the effects of feedthrough through the
board. A microstrip technique is by far the best, but is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to ground planes,
whereas signals are placed on the solder side.
Good decoupling is important when using high resolution
ADCs. Decouple all analog supplies with 10 μF tantalum
capacitors in parallel with 0.1 μF capacitors to AGND. To
achieve the best results from these decoupling components,
place them as close as possible to the device, ideally right up
against the device. Decouple all logic chips with 0.1 μF ceramic
capacitors to DGND. In systems in which a common supply
voltage is used to drive both the AVDD and DVDD of the AD7194,
it is recommended that the system AVDD supply be used. For
this supply, place the recommended analog supply decoupling
capacitors between the AVDD pin of the AD7194 and AGND
and the recommended digital supply decoupling capacitor
between the DVDD pin of the AD7194 and DGND.
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AD7194BCPZ-REEL7 功能描述:IC ADC 24BIT SPI 4.8KHZ 32LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類(lèi)型:2 個(gè)單端，單極
AD7195 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation
AD7195BCPZ 功能描述:IC AFE 24BIT 4.8K 32LFSP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR)
AD7195BCPZ 制造商:Analog Devices 功能描述:IC ADC 24BIT 4.8KSPS CSP-32
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