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| 型號： | AD7194BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/57頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT SPI 4.8K 32-LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Weigh Scale Introduction |
| 標準包裝： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 4.8k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-WQ（5x5） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個差分，單極；8 個差分，雙極；16 個偽差分，單極；16 偽差分，雙極 |
| 產(chǎn)品目錄頁面： | 777 (CN2011-ZH PDF) |
| 其它名稱： | AD7194BRUZ AD7194BRUZ-ND |
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Data Sheet
AD7194
Rev. A | Page 25 of 56
Table 21. Configuration Register Bit Designations
Bit Location
Bit Name
Description
CON23
Chop
Chop enable bit.
When the chop bit is cleared, chop is disabled. With chop disabled, higher conversion rates are allowed.
For an FS word of 96 decimal and the sinc4 filter selected, the conversion time is 20 ms and the settling
time is 80 ms. However, at low gains, periodic calibrations may be required to remove the offset and
offset drift.
When the chop bit is set, chop is enabled. When chop is enabled, the offset and offset drift of the ADC
are continuously removed. However, this increases the conversion time and settling time of the ADC.
For example, when FS = 96 decimal and the sinc4 filter is selected, the conversion time with chop
enabled equals 80 ms and the settling time equals 160 ms.
CON22, CON21
0
These bits must be programmed with a Logic 0 for correct operation.
CON20
REFSEL
Reference select bits. The reference source for the ADC is selected using these bits.
REFSEL
Reference Voltage
0
External reference applied between REFIN1(+) and REFIN1().
1
External reference applied between the AIN3/P1/REFIN2(+) and AIN4/P0/REFIN2() pins.
CON19
0
This bit must be programmed with a Logic 0 for correct operation.
CON18
Pseudo
Pseudo differential analog inputs. When the pseudo bit is set to 1, the AD7194 is configured to have 16
pseudo differential analog inputs with AINCOM as the common negative terminal. Bits CH7 to CH4
select the positive input terminal while bits CH3 to CH0 have no effect. When the pseudo bit is set to 0,
channel selection is controlled using the CH7 to CH0 bits.
CON17
0
This bit must be programmed with a Logic 0 for correct operation.
CON16
Temp
Temperature sensor select bit. When the Temp bit is set to 1, the internal temperature sensor is selected. When
the Temp bit is low, the analog input channel as determined by the Pseudo bit and the CH7 to CH0 bits is
selected. The temperature sensor does not have a unique code in bits CHD3 to CHD0 of the status register.
CON16 to CON8
CH7 to CH0
Channel select bits. These bits select which channel is enabled on the AD7194 (see Table 22 to Table 24).
The conversion on each channel requires the complete settling time. The four LSBs of the status register
indicate the channel corresponding to the conversion in the data register. The four LSBs correspond to
bits CH7 to CH3, that is, the positive analog input terminal.
CON7
Burn
When this bit is set to 1, the 500 nA current sources in the signal path are enabled. When Burn = 0, the
burnout currents are disabled. The burnout currents can be enabled only when the buffer is active and
when chop is disabled.
CON6
REFDET
Enables the reference detect function. When set, the NOREF bit in the status register indicates when the
external reference being used by the ADC is open circuit or less than 0.6 V maximum. The reference
detect circuitry operates only when the ADC is active.
CON5
0
This bit must be programmed with a Logic 0 for correct operation.
CON4
BUF
Enables the buffer on the analog inputs.
If BUF is set, the analog inputs are buffered, allowing the user to place source impedances on the front
end without contributing gain errors to the system. When the buffer is enabled, it requires some head-
room; therefore, the voltage on any input pin must be limited to 250 mV within the power supply rails.
If cleared, the analog inputs are unbuffered, lowering the power consumption of the device. With the
buffer disabled, the voltage on the analog input pins can be from 50 mV below AGND to 50 mV above AVDD.
CON3
U/B
Polarity select bit.
When this bit is set, unipolar operation is selected.
When this bit is cleared, bipolar operation is selected.
CON2 to CON0
G2 to G0
Gain select bits. These bits are written by the user to select the ADC input range as follows:
G2
G1
G0
Gain
ADC Input Range (2.5 V Reference)
0
1
±2.5 V
0
1
Reserved
0
1
0
Reserved
0
1
8
±312.5 mV
1
0
16
±156.2 mV
1
0
1
32
±78.125 mV
1
0
64
±39.06 mV
1
128
±19.53 mV
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| AD7194BCPZ-REEL | 功能描述:IC ADC 24BIT SPI 4.8KHZ 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7194BCPZ-REEL7 | 功能描述:IC ADC 24BIT SPI 4.8KHZ 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7195 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation |
| AD7195BCPZ | 功能描述:IC AFE 24BIT 4.8K 32LFSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
| AD7195BCPZ | 制造商:Analog Devices 功能描述:IC ADC 24BIT 4.8KSPS CSP-32 |
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