參數(shù)資料
型號： AD7194BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 43/57頁
文件大?。?/td> 0K
描述： IC ADC 24BIT SPI 4.8K 32-LFCSP
產(chǎn)品培訓(xùn)模塊： Weigh Scale Introduction
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 24
采樣率（每秒）： 4.8k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 32-WFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-WQ（5x5）
包裝： 管件
輸入數(shù)目和類型： 8 個(gè)差分，單極；8 個(gè)差分，雙極；16 個(gè)偽差分，單極；16 偽差分，雙極
產(chǎn)品目錄頁面： 777 (CN2011-ZH PDF)
其它名稱： AD7194BRUZ
AD7194BRUZ-ND
Data Sheet
AD7194
Rev. A | Page 47 of 56
of 42.10 Hz when the master clock equals 4.92 MHz. The sinc
filter places the first notch at
fNOTCH = fCLK/(1024 × FS[9:0])
The postfiltering places notches at fNOTCH/Avg (Avg is the
amount of averaging) and multiples of this frequency; therefore,
when FS[9:0] is set to 6 and the postfilter averaging is 16, a
notch is placed at 800 Hz due to the sinc filter and notches are
placed at 50 Hz and multiples of 50 Hz due to the postfilter. The
notch at 50 Hz is a first-order notch; therefore, the notch is not
wide. This means that the rejection at 50 Hz exactly is good,
assuming a stable 4.92 MHz master clock. However, in a band
of 50 Hz ± 1 Hz, the rejection degrades significantly. The
rejection at 50 Hz ± 0.5 Hz is 40 dB minimum, assuming a
stable clock; therefore, a good master clock source is
recommended when using fast settling mode.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
30
60
90
120
150
FREQUENCY (Hz)
FI
L
T
E
R
G
AI
N
(
d
B)
08566-
055
Figure 56. Filter Response for Average + Decimate Filter
(Sinc4 Filter, FS[9:0] = 6, Average by 16)
Figure 57 shows the filter response when FS[9:0] is set to 5 and
the postfilter averages by 16. In this case, the output data rate is
equal to 50.53 Hz (4.92 MHz master clock) while the first filter
notch is placed at 60 Hz. The rejection at 60 Hz ± 0.5 Hz is
equal to 40 dB minimum.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
30
60
90
120
150
FREQUENCY (Hz)
FI
L
T
E
R
G
AI
N
(
d
B)
08566-
056
Figure 57. Filter Response for Average + Decimate Filter
(Sinc4 Filter, FS[9:0] = 5, Average by 16)
Simultaneous 50 Hz/60 Hz rejection is achieved when FS[9:0] is
set to 30 and the postfilter averages by 16. The output data rate
is equal to 8.4 Hz whereas the rejection at 50 Hz ± 0.5 Hz and
60 Hz ± 0.5 Hz is 44 dB typically.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
FREQUENCY (Hz)
FI
L
T
E
R
G
AI
N
(
d
B)
0
30
60
90
120
150
08566-
057
Figure 58. Filter Response for Average + Decimate Filter
(Sinc4 Filter, FS[9:0] = 30, Average by 16)
Simultaneous 50 Hz and 60 Hz rejection is also achieved by
using an FS word of 96 and averaging by 16; this places a notch
at 50 Hz. Setting the REJ60 bit to 1 places a notch at 60 Hz (see
Figure 59). The output data rate is reduced to 2.63 Hz with this
configuration but the rejection is improved to 100 dB typically
at 50 Hz ± 1 Hz and 60 Hz ± 1 Hz.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
30
60
90
120
150
FREQUENCY (Hz)
FILTE
R
G
A
IN
(
dB
)
08566-
058
Figure 59. Filter Response for Average + Decimate Filter
(Sinc4 Filter, FS[9:0] = 96, Average by 16)
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