VDD = 2.7 V to 5.5 V, 2.0 V ≤ V
參數(shù)資料
型號(hào)： AD5066BRUZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 18/24頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT 2.7-5.5V QD 16TSSOP
標(biāo)準(zhǔn)包裝： 1,000
系列： nanoDAC™
設(shè)置時(shí)間： 15µs
位數(shù)： 16
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 4 電壓，雙極
采樣率（每秒）： *
AD5066
Rev. A | Page 3 of 24
SPECIFICATIONS
VDD = 2.7 V to 5.5 V, 2.0 V ≤ VREFA, VREFB, VREFC, VREFD ≤ VDD 0.4 V, all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
A Grade1
B Grade1
Unit
Conditions/Comments
Min
Typ
Max
Min
Typ
Max
STATIC PERFORMANCE2
Resolution
16
Bits
Relative Accuracy (INL)
±0.5
±4
±0.5
±1
LSB
TA = 40°C to +105°C
±0.5
±4
±0.5
±2
TA = 40°C to +125°C
Differential Nonlinearity (DNL)
±0.2
±1
±0.2
±1
LSB
Total Unadjusted Error (TUE)
±0.1
±0.8
±0.1
±0.8
mV
VDD = 2.7 V, VREF = 2 V
Zero-Code Error
0.05
0.1
0.05
0.1
mV
All 0s loaded to the DAC register
Zero-Code Error Drift3
±0.5
V/°C
Full-Scale Error
±0.01
±0.05
±0.01
±0.05
% FSR
All 1s loaded to the DAC register
Gain Error
±0.005
±0.05
±0.005
±0.05
% FSR
Gain Error Drift3
±0.5
ppm
ppm of FSR/°C
DC Crosstalk3
1
5
1
5
μV
Due to single-channel full-scale
output change
5
25
5
25
μV
Due to powering down (per channel)
OUTPUT CHARACTERISTICS3
Output Voltage Range
0
VREF
0
VREF
V
DC Output Impedance (Normal
Mode)
8
k
Output impedance tolerance ± 10%
DC Output Impedance
DAC in power-down mode
Output Connected to 100 k
Network
100
k
Output impedance tolerance ± 20 k
Output Connected to 1 k
Network
1
k
Output impedance tolerance ± 400
Power-Up Time4
2.9
s
DC PSRR
120
dB
VDD ± 10%, DAC = full scale
REFERENCE INPUTS
Reference Input Range
2
VDD 0.4
2
VDD 0.4
V
Reference Current
0.002
±1
0.002
±1
A
Per DAC channel
Reference Input Impedance
40
M
Per DAC channel
LOGIC INPUTS3
Input Current5
±1
A
Input Low Voltage, VINL
0.8
V
Input High Voltage, VINH
2.2
V
Pin Capacitance
4
pF
POWER REQUIREMENTS
VDD
2.7
5.5
2.7
5.5
V
All digital inputs at 0 V or VDD
DAC active, excludes load current
IDD
VIH = VDD and VIL = GND
Normal Mode6
2.5
3
2.5
3
mA
All Power-Down Modes7
0.4
A
1 Temperature range is 40°C to +125°C, typical at 25°C.
2 Linearity calculated using a code range of 0 to 65,535; output unloaded.
3 Guaranteed by design and characterization; not production tested.
4 Time taken to exit power-down mode and enter normal mode, 32nd clock edge to 90% of DAC midscale value, output unloaded.
5 Current flowing into individual digital pins. VDD= 5.5 V; VREF= 4.096 V; Code = midscale.
6 Interface inactive. All DACs active. DAC outputs unloaded.
7 All four DACs powered down.
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