Revision 13 2-17 Table 2-14 Summary of Maximum and Minimum DC Input Levels Applicable to Commercial and Indus" />
參數(shù)資料
型號: A3PE-STARTER-KIT-2
廠商: Microsemi SoC
文件頁數(shù): 88/162頁
文件大?。?/td> 0K
描述: KIT EVAL FOR A3PE1500 PROASIC3
產(chǎn)品變化通告: Kit/Part Number Change 25/Jul/2012
標(biāo)準(zhǔn)包裝: 1
系列: ProASIC3
類型: FPGA
適用于相關(guān)產(chǎn)品: A3PE1500
所含物品: 板,電源,編程器
其它名稱: 1100-1144
A3PE-STARTER-KIT
ProASIC3E Flash Family FPGAs
Revision 13
2-17
Table 2-14 Summary of Maximum and Minimum DC Input Levels
Applicable to Commercial and Industrial Conditions
DC I/O Standards
Commercial1
Industrial2
IIL3
IIH4
IIL3
IIH4
A
3.3 V LVTTL / 3.3 V LVCMOS
10
15
3.3 V LVCMOS Wide Range
10
15
2.5 V LVCMOS
10
15
1.8 V LVCMOS
10
15
1.5 V LVCMOS
10
15
3.3 V PCI
10101515
3.3 V PCI-X
10101515
3.3 V GTL
10101515
2.5 V GTL
10101515
3.3 V GTL+
10
15
2.5 V GTL+
10
15
HSTL (I)
10101515
HSTL (II)
10
15
SSTL2 (I)
10101515
SSTL2 (II)
10
15
SSTL3 (I)
10101515
SSTL3 (II)
10
15
Notes:
1. Commercial range (0°C < TA < 70°C)
2. Industrial range (–40°C < TA < 85°C)
3. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN <
VIL.
4. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI.
Input current is larger when operating outside recommended ranges.
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