Revision 13 2-5 Thermal Characteristics Introduction The temperature variable in Designer software refers to t" />
參數(shù)資料
型號(hào): A3PE-STARTER-KIT-2
廠商: Microsemi SoC
文件頁數(shù): 74/162頁
文件大小: 0K
描述: KIT EVAL FOR A3PE1500 PROASIC3
產(chǎn)品變化通告: Kit/Part Number Change 25/Jul/2012
標(biāo)準(zhǔn)包裝: 1
系列: ProASIC3
類型: FPGA
適用于相關(guān)產(chǎn)品: A3PE1500
所含物品: 板,電源,編程器
其它名稱: 1100-1144
A3PE-STARTER-KIT
ProASIC3E Flash Family FPGAs
Revision 13
2-5
Thermal Characteristics
Introduction
The temperature variable in Designer software refers to the junction temperature, not the ambient
temperature. This is an important distinction because dynamic and static power consumption cause the
chip junction to be higher than the ambient temperature.
EQ 1 can be used to calculate junction temperature.
TJ = Junction Temperature = T + TA
EQ 1
where:
TA = Ambient Temperature
T = Temperature gradient between junction (silicon) and ambient T = ja * P
ja = Junction-to-ambient of the package. ja numbers are located in Table 2-5.
P = Power dissipation
Package Thermal Characteristics
The device junction-to-case thermal resistivity is
jc and the junction-to-ambient air thermal resistivity is
ja. The thermal characteristics for ja are shown for two air flow rates. The absolute maximum junction
temperature is 110°C. EQ 2 shows a sample calculation of the absolute maximum power dissipation
allowed for an 896-pin FBGA package at commercial temperature and in still air.
EQ 2
Temperature and Voltage Derating Factors
Maximum Power Allowed
Max. junction temp. (
C) Max. ambient temp. (C)
ja(C/W)
---------------------------------------------------------------------------------------------------------------------------------
110
C70C
13.6
C/W
-----------------------------------
5.88 W
=
Table 2-5 Package Thermal Resistivities
Package Type
Pin Count
jc
ja
Units
Still Air
200 ft./min.
500 ft./min.
Plastic Quad Flat Package (PQFP)
208
8.0
26.1
22.5
20.8
C/W
Plastic Quad Flat Package (PQFP) with
embedded heat spreader
208
3.8
16.2
13.3
11.9
C/W
Fine Pitch Ball Grid Array (FBGA)
256
3.8
26.9
22.8
21.5
C/W
484
3.2
20.5
17.0
15.9
C/W
676
3.2
16.4
13.0
12.0
C/W
896
2.4
13.6
10.4
9.4
C/W
Table 2-6 Temperature and Voltage Derating Factors for Timing Delays
(normalized to TJ = 70°C, VCC = 1.425 V)
Array Voltage
VCC (V)
Junction Temperature (°C)
–40°C
0°C
25°C
70°C
85°C
100°C
1.425
0.87
0.92
0.95
1.00
1.02
1.04
1.500
0.83
0.88
0.90
0.95
0.97
0.98
1.575
0.80
0.85
0.87
0.92
0.93
0.95
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