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| 型號(hào)： | 9S12XDP512DGV2 |
| 英文描述： | Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set) |
| 中文描述： | 設(shè)備用戶指南掩模組L15Y - （二硅-增強(qiáng)的功能集） |
| 文件頁(yè)數(shù)： | 83/152頁(yè) |
| 文件大小： | 1231K |
| 代理商： | 9S12XDP512DGV2 |
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2.3.64 PS0 / RXD0 — Port S I/O Pin 0
PS0 is a general purpose input or output pin. It can be configured as the receive pin RXD of Serial
Communication Interface 0 (SCI0).
2.3.65 PT[7:0] / IOC[7:0] — Port T I/O Pins [7:0]
PT7-PT0 are general purpose input or output pins. They can be configured as input capture or output
compare pins IOC7-IOC0 of the Enhanced Capture Timer (ECT).
2.4 Power Supply Pins
MC9S12XDP512 power and ground pins are described below.
NOTE:
All VSS pins must be connected together in the application.
2.4.1 VDDX1, VDDX2, VSSX1,VSSX2 — Power & Ground Pins for I/O Drivers
External power and ground for I/O drivers. Because fast signal transitions place high, short-duration
currentdemandsonthepowersupply,usebypasscapacitorswithhigh-frequencycharacteristicsandplace
them as close to the MCU as possible. Bypass requirements depend on how heavily the MCU pins are
loaded.
2.4.2 VDDR1, VDDR2, VSSR1, VSSR2 — Power & Ground Pins for I/O Drivers
& for Internal Voltage Regulator
External power and ground for I/O drivers and input to the internal voltage regulator. Because fast signal
transitions place high, short-duration current demands on the power supply, use bypass capacitors with
high-frequency characteristics and place them as close to the MCU as possible. Bypass requirements
depend on how heavily the MCU pins are loaded.
2.4.3 VDD1, VDD2, VSS1, VSS2 — Core Power Pins
Power is supplied to the MCU through VDD and VSS. Because fast signal transitions place high,
short-duration current demands on the power supply, use bypass capacitors with high-frequency
characteristics and place them as close to the MCU as possible. This 2.5V supply is derived from the
internal voltage regulator. There is no static load on those pins allowed. The internal voltage regulator is
turned off, if VREGEN is tied to ground.
NOTE:
No load allowed except for bypass capacitors.
2.4.4 VDDA, VSSA — Power Supply Pins for ATD and VREG
VDDA, VSSA are the power supply and ground input pins for the voltage regulator and the analog to
digital converters.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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