![](http://datasheet.mmic.net.cn/230000/9S12T64AF16V1_datasheet_15574448/9S12T64AF16V1_46.png)
Central Processing Unit (CPU)
MC9S12T64Revision 1.1.1
46
Central Processing Unit (CPU)
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MOTOROLA
MOVW#
oprx16
,
opr16a
MOVW#
opr16i
,
oprx0_xysppc
MOVW
opr16a
,
opr16a
MOVW
opr16a
,
oprx0_xysppc
MOVW
oprx0_xysppc
,
opr16a
MOVW
oprx0_xysppc
,
oprx0_xysppc
MUL
Move word
Memory-to-memory16-bitword-move
(M
1
:M
1
+1)
M
2
:M
2
+1
Firstoperandspecifiesword to move
IMM-EXT
IMM-IDX
EXT-EXT
EXT-IDX
IDX-EXT
IDX-IDX
INH
18 03 jj kk hh ll
18 00 xb jj kk
18 04 hh ll hh ll
18 01 xb hh ll
18 05 xb hh ll
18 02 xb xb
OPWPO
OPPW
ORPWPO
OPRPW
ORPWP
ORPWO
Multiply, unsigned
(A)
×
(B)
A:B; 8by8-bit
NegateM; 0–(M)
Mor(M)+1
M
12
O
NEG
opr16a
NEG
oprx0_xysppc
NEG
oprx9
,
xysppc
NEG
oprx16
,
xysppc
NEG[D,
xysppc
]
NEG[
oprx16
,
xysppc
]
NEGA
NEGB
NOP
NegateA;0–(A)
Aor(A)+1
A
NegateB;0–(B)
Bor(B)+1
B
Nooperation
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
INH
INH
INH
70 hh ll
60 xb
60 xb ff
60 xb ee ff
60 xb
60 xb ee ff
40
50
rPwO
rPw
rPwO
frPwP
fIfrPw
fIPrPw
O
O
A7
O
ORAA#
opr8i
ORAA
opr8a
ORAA
opr16a
ORAA
oprx0_xysppc
ORAA
oprx9
,
xysppc
ORAA
oprx16
,
xysppc
ORAA[D,
xysppc
]
ORAA[
oprx16
,
xysppc
]
ORAB#
opr8i
ORAB
opr8a
ORAB
opr16a
ORAB
oprx0_xysppc
ORAB
oprx9
,
xysppc
ORAB
oprx16
,
xysppc
ORAB[D,
xysppc
]
ORAB[
oprx16
,
xysppc
]
ORCC#
opr8i
ORaccumulator A
(A) | (M)
A
or (A) | imm
A
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
8A ii
9A dd
BA hh ll
AA xb
AA xb ff
AA xb ee ff
AA xb
AA xb ee ff
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
ORaccumulatorB
(B) | (M)
B
or (B) | imm
B
CA ii
DA dd
FA hh ll
EA xb
EA xb ff
EA xb ee ff
EA xb
EA xb ee ff
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
OR CCR; (CCR) | imm
CCR
14 ii
P
PSHA
Push A; (SP)–1
SP; (A)
M
SP
INH
36
Os
PSHB
Push B; (SP)–1
SP; (B)
M
SP
INH
37
Os
PSHC
Push CCR; (SP)–1
SP;
(CCR)
M
SP
Push D
(SP)–2
SP; (A:B)
M
SP
:M
SP+1
Push X
(SP)–2
SP; (X
H
:X
L
)
M
SP
:M
SP+1
Push Y
(SP)–2
SP; (Y
H
:Y
L
)
M
SP
:M
SP+1
Pull A
(M
SP
)
A; (SP)+1
SP
Pull B
(M
SP
)
B; (SP)+1
SP
Pull CCR
(M
SP
)
CCR; (SP)+1
SP
Pull D
(M
SP
:M
SP+1
)
A:B; (SP)+2
SP
INH
39
Os
PSHD
INH
3B
OS
PSHX
INH
34
OS
PSHY
INH
35
OS
PULA
INH
32
ufO
PULB
INH
33
ufO
PULC
INH
38
ufO
PULD
INH
3A
UfO
Table 4 Instruction Set Summary (Continued)
Source Form
Operation
Address
Mode
Machine
Coding (Hex)
Access Detail
S X H I N Z V C
– – – – – – – –
– – – – – – –
– – – –
– – – – – – – –
– – – –
0 –
– – – –
0 –
–
– – – – – – – –
– – – – – – – –
– – – – – – – –
– – – – – – – –
– – – – – – – –
– – – – – – – –
– – – – – – – –
– – – – – – – –
– – – – – – – –
F
Freescale Semiconductor, Inc.
n
.