參數(shù)資料
型號： 950812CGLF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘產(chǎn)生/分配
英文描述： 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-56
文件頁數(shù)： 31/31頁
文件大?。?/td> 285K
代理商： 950812CGLF
9
ICS950812
0542H—04/08/05
Pin #
Name
0
1
PWD
Bit 7
X
-
Spread Spectrum Bit7
RW
-
X
Bit 6
X
-
Spread Spectrum Bit6
RW
-
X
Bit 5
X
-
Spread Spectrum Bit5
RW
-
X
Bit 4
X
-
Spread Spectrum Bit4
RW
-
X
Bit 3
X
-
Spread Spectrum Bit3
RW
-
X
Bit 2
X
-
Spread Spectrum Bit2
RW
-
X
Bit 1
X
-
Spread Spectrum Bit1
RW
-
X
Bit 0
X
-
Spread Spectrum Bit0
RW
-
X
Affected Pin
Note: Please utilize software utility provided by ICS Application Engineering to configure spread spectrum. Incorrect spread
percentage may cause system failure.
BYTE
13
Control Function
Type
Bit Control
Pin #
Name
0
1
PWD
Bit 7
X
-
(Reserved)
RW
-
X
Bit 6
X
-
(Reserved)
RW
-
X
Bit 5
X
-
Spread Spectrum Bit13
RW
-
X
Bit 4
X
-
Spread Spectrum Bit12
RW
-
X
Bit 3
X
-
Spread Spectrum Bit11
RW
-
X
Bit 2
X
-
Spread Spectrum Bit10
RW
-
X
Bit 1
X
-
Spread Spectrum Bit9
RW
-
X
Bit 0
X
-
Spread Spectrum Bit8
RW
-
X
BYTE
14
Affected Pin
Control Function
Note: Please utilize software utility provided by ICS Application Engineering to configure spread spectrum. Incorrect spread
percentage may cause system failure.
Bit Control
Type
Note: See table 8 for Byte 11-14 default information
Spread Spectrum Enable Procedure
Step 1: Power-up ---- Latched inputs, FS(5:0), set frequency per Hardware default on board. SS is off.
BIOS program set IIC Byte0, bit7 to 1, SS will be enable Spread. Note that Byte 10,
bit 7 is default to 0. This allows all setup to be controlled by the Frequency Select
Tables, 1 and 2.
Step 3: To set up Linear programming and SS% adjust using Byte 11 through 14, the BIOS must set
Byte 10, bit 7 to a 1. This will enable access to Byte 11 and 12, M/N linear programming
and Byte 13 and 14, Spread Spectrum % adjust.
Step 2: After power up, SS% can be changed to the fixed selections shown in Frequency Table 2. This
is achieved by Writing to Byte 4, bit 6/7 (FS5:4) and/or Byte 0 (FS3), The data written
to these bytes will overwrite the existing contents and switch to the desired selection.
相關(guān)PDF資料
PDF描述
08056C103JAT4A General Specifications
950812YGLFT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
950812YGT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
950902DGLFT 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
08056C103JAT7A Separating plate, width: 0.8 mm, color: gray - TS-GSK
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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950812YFLFT 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 200MHz Differential CPU Clocks
950812YGLFT 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 200MHz Differential CPU Clocks
950813 制造商:Weidmuller 功能描述:NEXT 74/55/16, 4GP, ST, ZINC -EA - Bulk
9508131 制造商:Molex 功能描述:
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