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參數(shù)資料
| 型號： | 950812CGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 16/31頁 |
| 文件大?。?/td> | 285K |
| 代理商： | 950812CGLF |
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23
ICS950812
0542H—04/08/05
All 3V66 clocks are to be in phase with each other. All 66MHz_OUT clocks are to be in phase with each other. There is
NO phase relationship between the 3V66 clocks and the 66MHz_OUT and PCI clocks. In the case where 3V66_1 is
configured as 48MHz VCH clock, there is no defined phase relationship between 3V66_1_VCH and other 3V66 clocks.
The PCI group should lag 3V66 by the standard skew described below as Tpci.
The 66MHz_IN to 66MHz_OUT delay is shown in the figure below and is specified to be within a min and max propagation
value.
Buffered Mode - 3V66[0:1], 66MHz_IN, 66MHz_OUT[0:2] and PCI Phase Relationship
Group to Group Skews at Common Transition Edges: Buffered Mode
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
66MHz_IN 66MHz_OUT
1,2
Tpd
Propogation delay from
66MHz_IN to 66MHz_OUT (2:0)
2.5
2.9
4.5
ns
66MHz_OUT to PCI
1,2
Tpci
66MHz_OUT (2:0) leads 33 MHz
PCICLK
1.5
3.5
ns
1Guaranteed by design, not 100% tested in production.
2500ps Tolerance
E_PCICLK to PCICLK Skews
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TE_PCI-PCI1
E_PCICLK1 (pin 11)=0
E_PCICLK3 (pin 13)=1
0.3
0.5
0.7
ns
TE_PCI-PCI2
E_PCICLK1 (pin 11)=1
E_PCICLK3 (pin 13)=0
0.8
1.0
1.2
ns
TE_PCI-PCI3
E_PCICLK1 (pin 11)=1
E_PCICLK3 (pin 13)=1
1.3
1.5
1.7
ns
1Guaranteed by design, not 100% tested in production.
E_PCICLK to PCICLK
1
66MHz_IN
66MHz_OUT
3V66
Tpd
Tpci
No Relationship
E_PCICLK (3,1)
Tepci
PCICLK_F (2:0) PCICLK (6:0)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 08056C103JAT4A | General Specifications |
| 950812YGLFT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 950812YGT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 950902DGLFT | 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 08056C103JAT7A | Separating plate, width: 0.8 mm, color: gray - TS-GSK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 950812CGLFT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 950812YFLFT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| 950812YGLFT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| 950813 | 制造商:Weidmuller 功能描述:NEXT 74/55/16, 4GP, ST, ZINC -EA - Bulk |
| 9508131 | 制造商:Molex 功能描述: |
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