
84C24
4-27
MD400147/A
5.9 OSCILLATOR
The 84C24 requires a 10 Mhz reference frequency for
internal signal generation. This 10Mhz reference fre-
quency can be generated by either connecting an external
crystal or an external clock between OSCIN and GND.
If the crystal oscillator is used, it needs only an external
crystal, and no other external capacitors or other compo-
nents are required. The crystal must have the character-
istics shown in Table 11. The crystal must be placed as
close as possible to OSCIN and GND so that parasitics on
OSCIN are kept to a minimum.
5.10 LED DRIVERS
The PLED[3:0] outputs can all drive LED's tied to V
. The
PLED[3:0] outputs can be programmed through the serial
port to do one of 5 different functions: (1) Link Detect
Indication, (2) Full Duplex Indication, (3) On, (4) Off, or (5)
Blink. The PLED[3:0] pins can be programmed for one of
these 5 functions by appropriately setting the LED output
select bits in the Global Configuration and Channel Con-
figuration registers. When the PLED[3:0] pins are pro-
grammed to indicate Link or Full Duplex, the LED output
drivers are controlled by nternal ogic described n he Link
Integrity and Full Duplex section. When PLED[3:0] is
programmed to be On, the LED output driver goes low,
thus turning on the LED under user control. When
PLED[3:0] is programmed to be Off, the LED output driver
turn off, thus turning off the LED under user control. When
PLED[3:0] is programmed to Blink, the LED output driver
will continuously blink at a rate of 100 ms on, 100 ms off.
The On and Off functions allow the LED driver to be
controlled directly through the serial port to indicate any
function that is desired under external control. The Blink
function allows he same external control of the LED driver
and also offers the provision to blink the LED without the
need for any external timers.
The PLED[3:0] outputs can also drive other digital inputs
and can be user defined and controlled through the serial
port.
5.11 POWER SUPPLY DECOUPLING
There are eight V
CC
's on the 84C24 (V
CC
[8:1] ) and eight
GND's (GND[8:1]).
All eight V
's should be connected together as close as
possible to the device with a large V
plane. If the V
's
vary n potential by even a small amount, noise and atchup
can result.
All eight GND's should also be connected together as
close as possible to the device with a large ground plane.
If the GND's vary in potential by even a small amount,
noise and latchup can result.
A 0.01-0.1uF decoupling capacitor should be connected
between each V
/GND set as close as possible to the
device pins, preferably within 0.5".
The V
connection to the transmit transformer center tap
shown n Figures 7 and 8 has to be well decoupled n order
to minimize common mode noise injection from V
onto
the TP inputs and outputs. It is recommended that a
0.01
μ
F decoupling capacitor be placed between the cen-
ter tap V
to the 84C24 GND plane. This decoupling
capacitor should be physically placed within 0.5" of the
transformer center tap.
The PCB ayout and power supply decoupling should keep
any AC ripple and noise voltage across each VCC-GND
pin combination to less than 100 mVpp, and preferably
less than 50 mVpp. In addition, the VCC’s should all be
within 25 mV of each other, and he GND’s should be within
25mV of each other, when measured at the device.