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參數(shù)資料
| 型號： | 80C03 |
| 廠商： | LSI Corporation |
| 英文描述： | AutoDUPLEX CMOS Ethernet Data Link Controller(AutoDUPLEX CMOS 以太網(wǎng)數(shù)據(jù)鏈路控制器) |
| 中文描述： | AutoDUPLEX的CMOS以太網(wǎng)數(shù)據(jù)鏈路控制（AutoDUPLEX的CMOS以太網(wǎng)數(shù)據(jù)鏈路控制器） |
| 文件頁數(shù)： | 2/19頁 |
| 文件大小： | 247K |
| 代理商： | 80C03 |
80C03
4-2
MD400121/C
Description
The SEEQ Ethernet Data Link Controller (EDLC
) is
designed to support Data Link Layer (layer 2) of the
Ethernet specification or Local Area Networks (LAN). The
system interface is optimized for ease of connection to
commonly available DMA Controllers and specifically for
BURST MODE OPERATION. The 80C03 interfaces di-
rectly to the 8023A and 8020 Manchester Code Convert-
ers (MCC
TM
) to complete the station resident Ethernet
functions. The protocol used is Carrier Sense, Multiple
Access with Collision Detection (CSMA/CD). The 80C03
EDLC chip is a single VLSI device which is designed to
greatly simplify the development of Ethernet communica-
tion in computer based systems. The 80C03 provides an
economic solution for the construction of an Ethernet
node, providing high speed data communication at 10
Megabits/second and sees applications in terminals,
workstations, personal computers, small business sys-
tems, and large computer systems, in both the office and
industrial environment. The 80C03 EDLC chip has a
universal system interface compatible with almost any
microprocessor, microcomputer, or system bus, allowing
the system designer to make the price/performance
tradeoffs for each application. The transmit and receive
sections of the EDLC chip are independent and can
operate simultaneously to allow reception of a transmitted
frame for use in loopback diagnostics modes.
The 80C03 is compatible with SEEQ 8003 and provides
additional programmable features. The features enabled
on demand are: 64 bit Multicast filter, Transmit Collision
Counter, Total Collision Counter, Status Reporting of
Carrier and SQE during transmits, Transmit no CRC,
Transmit no Preamble, Transmit Packet Autopadding,
Receive CRC, Receive Own Transmit disable, Receive
Group Address mode, Fast Receive Discard Mode, and
Full Duplex Mode.
Functional Description
Frame Format
On an Ethernet communication network, information is
transmitted and received in packets or frames. An Eth-
ernet frame consists of a preamble, two address fields, a
byte-count field, a data field and a frame check sequence
(FCS). Each field has a specific format which s described
in detail below. An Ethernet frame has a minimum length
of 64 bytes and a maximum ength of 1518 bytes exclusive
of the preamble. The Ethernet frame format is shown
below.
NOTE:
Field length in bytes in parentheses.
Figure 1. Dual-In-Line
Top View
MCC is a trademarks of SEEQ Technology Inc.
EDLC is a registered trademark of SEEQ Technology Inc.
Figure 2. Plastic Leaded Chip Carrier
Top view
6
5
4
3
2
1
4
4
4
4
4
7
8
9
10
11
12
13
14
15
16
17
1
1
2
2
2
2
2
2
2
2
2
39
38
37
36
35
34
33
32
31
30
29
CdSt 1
CdSt 0
CdSt 2
CdSt 3
CdSt 4
CdSt 5
CdSt 6
CdSt 7
RxC
ADUPLX*
R
T
T
T
A
A
C
V
A
W
R
C
VSS
T
R
R
R
C
I
R
C
R
R
VS
RxTxD5
RxTxD3
RxTxD7
TxWR
RxTxD4
RxTxD6
RxTxD2
RxTxD1
TxC
VSS
VSS
A1
A0
TxEN
TxD
1
2
3
4
5
6
7
8
9
10
11
12
40
39
38
37
36
35
34
33
32
31
30
29
VCC
A2
WR
RD
13
14
15
16
17
18
19
20
28
27
26
25
24
23
22
21
VSS
TxRET
RxTxD0
RxTxD1
RxTxD2
RxTxD3
RxTxD4
RxTxD5
RxTxD6
RxTxD7
TxC
TxWR
TxRDY
RxTxEOF
RxRD
RxRDY
CdSt0
CdSt1
CdSt2
CdSt3
CdSt4
CdSt5
CdSt6
CdSt7
RxC
CS
RxD
CSN
INT
COLL
RESET
RxDC
PREAMBLE
(8)
DESTINATION
ADDRESS
(6)
SOURCE
ADDRESS
(6)
BYTE
COUNT
(2)
DATA
(46-1500)
FCS
(4)
ETHERNET FRAME
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