參數(shù)資料
型號(hào)： 78Q2133R/F
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 4/38頁(yè)
文件大?。?/td> 0K
描述： TXRX 10/100 MDIX 3.3V IND 32-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類(lèi)型： PHY 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 4/4
規(guī)程： IEEE 802
電源電壓： 3 V ~ 3.6 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 32-QFN 裸露焊盤(pán)（5x5）
包裝： 帶卷 (TR)
78Q2123/78Q2133 Data Sheet
DS_21x3_001
12
Rev. 1.6
RXD[3:0]
[5:8]
COZ
RECEIVE DATA: Received data is provided to the MAC via RXD[3:0].
These pins are tri-stated in isolate mode.
RX_ER
13
COZ
RECEIVE ERROR: RX_ER is asserted high when an error is detected
during frame reception. In PCS bypass mode, this pin becomes the MSB of
the receive 5-bit code group. This pin is tri-stated in isolate mode.
MDC
2
CIS
MANAGEMENT DATA CLOCK: MDC is the clock used for transferring
data via the MDIO pin.
MDIO
1
CIO
MANAGEMENT DATA INPUT/OUTPUT: MDIO is a bi-directional port
used to access management registers within the 78Q2123/78Q2133. This
pin requires an external pull-up resistor as specified in IEEE-802.3.
2.3
Control and Status
Signal
Pin
Type
Description
RST
23
CIS
ACTIVE LOW RESET: When pulled low the pin resets the chip. The reset
pulse must be long enough to guarantee stabilization of the supply
voltage and startup of the oscillator. Refer to the Electrical Specifications
for the reset pulse requirements. There are two other ways to reset the
chip:
1.
Through the internal power-on-reset (activated when the chip is
being powered up).
2.
Through the MII register bit (MR 0.15).
INTR
32
COZ
INTERRUPT PIN: This pin is used to signal an interrupt to the media
access controller. The pin is held in the high impedance state when an
interrupt is not indicated. The pin will be forced high or low to signal an
interrupt depending upon the value of the INPOL bit (MR16.14). The
events which trigger an interrupt can be programmed via the Interrupt
Control Register located at address MR17.
2.4
MDI (Media Dependent Interface)
Signal
Pin
Type
Description
TXOP,
TXON
30,31
A
TRANSMIT OUTPUT POSITIVE/NEGATIVE: Transmitter differential
outputs for both 10base-T and 100base-TX.
RXIP,
RXIN
28,27
A
RECEIVE INPUT POSITIVE/NEGATIVE: Receiver differential inputs for
both 10BASE-T and 100BASE-TX.
2.5
Oscillator/Clock
Signal
Pin
Type
Description
XTLP
24
A
CRYSTAL INPUT: Should be connected to a 25 MHz crystal. If an
externally generated TTL compatibility clock signal is used, that signal is
applied here.
XTLN
25
A
CRYSTAL OUTPUT: Should be connected to a 25 MHz crystal. When an
external clock source is being used, this pin must be grounded.
2.6
Power Supply and Ground
Signal
Pin
Type
Description
PWR
9, 26
S
+3.3VDC SUPPLY
GND
10, 29
G
GROUND
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