參數(shù)資料
型號(hào): 78Q2133R/F
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 15/38頁(yè)
文件大小: 0K
描述: TXRX 10/100 MDIX 3.3V IND 32-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: PHY 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: IEEE 802
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 帶卷 (TR)
78Q2123/78Q2133 Data Sheet
DS_21x3_001
22
Rev. 1.6
3.15 MR23: LED Configuration Register
Bit
Symbol
Type
Default
Description
23.15:8
Reserved
NA
<0000>
Must set to zero on each write to MR23
23.7:4
LED1[3:0]
R/W
<1h>
0000 = Link OK
0001 = RX or TX Activity (Default LED1)
0010 = TX Activity
0011 = RX Activity
0100 = Collision
0101 = 100 BASE-TX mode
0110 = 10 BASE-T mode
0111 = Full Duplex
1000 = Link OK/Blink=RX or TX Activity
23.3:0
LED0[3:0]
R/W
<0h>
0000 = Link OK (Default LED0)
0001 = RX or TX Activity
0010 = TX Activity
0011 = RX Activity
0100 = Collision
0101 = 100 BASE-TX mode
0110 = 10 BASE-T mode
0111 = Full Duplex
1000 = Link OK/Blink=RX or TX Activity
3.16 MR24: MDI/MDIX Control Register
Bit
Symbol
Type
Default
Description
24.15:8
Reserved
R
0
Reserved
24.7
PD_MODE
R/W
1
Write a ‘1’ to this bit to add Parallel Detect mode. This
will allow auto-switching to work when auto-negotiation is
off while the other device has it on.
24.6
AUTO_SW
R/W
1
Write a ‘1’ to this bit to enable auto switching.
24.5
MDIX
R/W
0
Indicates state of the MDI pair or force configuration:
1 = MDIX (cross over)
0 = MDI
When auto_sw is a ‘1’, this bit will only be readable.
When auto_sw is a ‘0’ this bit can be written to set the
configuration.
24.4
MDIX_CM
R
0
Indicates completion of auto-switch sequence.
1 = Sequence completed.
0 = Sequence in progress or auto-switch is disabled.
24.3:0
MDIX_SD
R/W
<0000>
Write initial pattern seed for switching algorithm. The
initial seed directly affects attempts [5,4] respectively to
write bits [3:0]. Setting to [0000] will result in device
using its own seed of [0101].
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