
APPE NDIX
Appendix 2. Memory assignment in SFR area
7751 Group User’s Manual
20–8
Timer A0 interrupt control register
Timer A1 interrupt control register
Timer A2 interrupt control register
Timer A3 interrupt control register
Timer A4 interrupt control register
Timer B0 interrupt control register
UART1 receive interrupt control register
UART0 transmit interrupt control register
UART0 receive interrupt control register
Access characteristics
State immediately after a reset
b7
Watchdog timer frequency select register
60
16
61
16
62
16
63
16
64
16
65
16
66
16
67
16
68
16
69
16
6A
16
70
16
71
16
72
16
73
16
74
16
75
16
76
16
77
16
78
16
79
16
7A
16
7B
16
7C
16
7D
16
7E
16
7F
16
6B
16
6C
16
6D
16
6E
16
6F
16
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
b7
b0
(Note 1)
RW
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(Note 2)
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RW
Address
A-D conversion interrupt control register
UART1 transmit interrupt control register
INT
2
interrupt control register
Register name
Watchdog timer register
Timer B1 interrupt control register
Timer B2 interrupt control register
INT
0
interrupt control register
INT
1
interrupt control register
Notes 1:
By writing dummy data to address 60
16
, a value “FFF
16
” is set to the watchdog timer. The
dummy data is not retained anywhere.
2:
The value “FFF
16
” is set tot the watchdog timer. (Refer to
“Chapter 9. WATCHDOG TIMER.”
)
: It is possible to read the bit state at reading. The written value becomes valid data.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid data. It is impossible to read the bit state.
: Nothing is assigned. It is impossible to read the bit state. The written value is ignored.
RW
RO
WO
Access characteristics
: “0” immediately after a reset.
: “1” immediately after a reset.
:
Undefined immediately after
a reset.
0
1
: Always “0” at reading
0
0
: Always undefined at reading
: “0” immediately after a reset. Fix this bit to “0.”
State immediately after a reset